feat: add model-instruction-from-spec skill#1757
feat: add model-instruction-from-spec skill#1757adingank-qualcomm wants to merge 12 commits intoriscv:mainfrom
Conversation
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Adds a Claude skill that generates IDL operation() bodies for RISC-V instructions from their YAML spec files, writing to the spec if the operation() key is empty or to /tmp/<name>.yaml if already populated. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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Coverage 71.94% 71.94%
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Files 54 54
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Branches 6183 6183
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| Single-letter tokens (`R`, `I`, `S`, `B`, `U`, `J`) are format names, not instructions — exclude them. | ||
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| Two-letter tokens that are register names (`x0`–`x31`, `rd`, `rs1`, `rs2`) — exclude them. |
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These aren't all "two-letter tokens". :-)
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Removed the mention of length of tokens.
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| Any token introduced by "pseudoinstruction" (with or without "assembler") must be excluded, even if it appears elsewhere in the subsection outside a pseudoinstruction context. Collect all pseudoinstruction names first, then exclude them from the final list. | ||
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| **Definitive exclusion list — never treat these as instructions:** |
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"Definitive" seems too strong here and could be interpreted to override the preceding paragraph. Maybe "The following tokens should never be considered instruction names..."
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Fed this comment directly to the agent (or "The Agent" ;-) and got it done!
Perhaps an overkill, but it saved some context switching for me to do these
changes manually!
| Copyright (c) 2026 Qualcomm Technologies, Inc. and/or its subsidiaries. | ||
| SPDX-License-Identifier: BSD-3-Clause | ||
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| Given a RISC-V instruction name, locate its YAML spec file under `spec/std/isa/inst/`, read the instruction's description, encoding, and any existing `sail()` implementation, then generate a correct IDL `operation()` body using the IDL language defined by the Treetop grammar in `tools/ruby-gems/idlc/lib/idlc/idl.treetop`. |
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sail() is being removed from UDB.
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Removed ref.
| - **`definedBy`**: The extension(s) that define this instruction. | ||
| - **`access`**: Privilege levels at which the instruction is accessible. | ||
| - **`operation()`**: The current value — check whether it is empty (just `|` with no following content before the next key) or already populated. | ||
| - **`sail()`**: If present, the Sail formal semantics — use this as a reference for the intended behavior. |
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sail() is being removed from UDB.
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Done! Removed references to Sail from other parts also.
| - Custom struct/enum types (e.g., `VectorState`, `VmaOrderType`) | ||
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| **Register access:** | ||
| - `X[reg_name]` — read/write integer register (e.g., `X[xs1]`, `X[xd]`) |
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should you add float register file here?
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Added; it will show up in the next commit which will address all of your comments from yesterday.
| # IDL code here | ||
| XReg src = X[xs1]; | ||
| X[xd] = src + 1; | ||
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any special reason for the blank line here?
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oh, you mention it right below. heh. Not sure it's needed but NBD.
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The agent included the blank line for a convention which improves readability
(or eye strain, I think ;-) so I'm leaning towards leaving it in.
- model-instruction-from-spec: remove Sail references (being removed from UDB YAML files), add floating-point register access syntax - extract-instructions-from-subsection: soften exclusion list heading, drop "Two-letter" qualifier from register name exclusion rule Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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@ThinkOpenly I had another chat with "The Agent" to address all of your comments from yesterday. |
Summary
.claude/skills/model-instruction-from-spec/SKILL.mdthat generates IDLoperation()bodies for RISC-V instructions from their YAML spec filesspec/std/isa/inst/, reads the description, encoding, andsail()reference, then generates syntactically valid IDL per the grammar intools/ruby-gems/idlc/lib/idlc/idl.treetopoperation()is empty, or to/tmp/<name>.yamlif already populatedTest plan
/model-instruction-from-spec <instruction>on an instruction with an emptyoperation()and verify IDL is written into the spec YAML/model-instruction-from-spec <instruction>on an instruction with a populatedoperation()and verify output goes to/tmp/<name>.yaml🤖 Generated with Claude Code