Add Zvbb extension

[rez5427]

I noticed that PR #236 does not yet implement the vwsll instruction. However, based on the latest draft, this instruction has recently been updated. The ZvkB extension has now been split into Zvbc and Zvbb.

The following variants of the vwsll instruction have been included:

vwsll [vv,vx,vi]

Additionally, I have successfully passed all vwsll tests from the RISC-V vector tests repository.

[github-actions]

Test Results

396 tests  ±0   396 ✅ ±0   0s ⏱️ ±0s
  4 suites ±0     0 💤 ±0 
  1 files   ±0     0 ❌ ±0 

Results for commit 037daa6. ± Comparison against base commit fd1be4b.

♻️ This comment has been updated with latest results.

[Alasdair]

Looks good overall, I left some small comments.

I'll have to give that vector test generator a go, I've been trying better understand the vector extension and our implementation recently.

[Alasdair]

I recently refactored this into:

let (initial_result, mask)  = init_masked_result(num_elem, SEW_widen, LMUL_pow - 1, vd_val, vm_val);
var result = initial_result;

elsewhere, so we can remove the = undefined lines. Would be good to make this consistent.

[Alasdair]

(also same for the above instructions)

[Alasdair]

Should these OCaml removal changes be part of this PR? We recently removed it the OCaml simulator, not sure if these were missed or just an artifact of a rebase commit.

[Alasdair]

Wondering if we have this mapping already somewhere?

[rez5427]

@Alasdair I mistakenly used the riscv-vector-tests to generate ELF files with vlen=256, which differ from the vlen=512 in sail-riscv. After rerunning the tests, I discovered that there is a difference in the new_vl calculation between the implementations. The riscv-vector-tests use VLMAX, while sail-riscv use ceil(AVL / 2).

val calculate_new_vl : (int, int) -> xlenbits
function calculate_new_vl(AVL, VLMAX) = {
/* Note: ceil(AVL / 2) ≤ vl ≤ VLMAX when VLMAX < AVL < (2 * VLMAX)
* TODO: configuration support for either using ceil(AVL / 2) or VLMAX
*/
if AVL <= VLMAX then to_bits(sizeof(xlen), AVL)
else if AVL < 2 * VLMAX then to_bits(sizeof(xlen), (AVL + 1) / 2)
else to_bits(sizeof(xlen), VLMAX)
}

resulted in successful test execution when change the to_bits(sizeof(xlen), (AVL + 1) / 2) to to_bits(sizeof(xlen), VLMAX)

[rez5427]

I noticed the vctz vclz is missing. So I added.

[rez5427]

And vcpop