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Tracking Issue for RISC-V Ratified Extensions Intrinsics #114544

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@coastalwhite

This issue tracks the implementation of all the intrinsics linked to the Ratified RISC-V Extensions. The, not yet stable intrinsics are behind the riscv_ext_intrinsics nightly feature.

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  1. added
    C-tracking-issueCategory: An issue tracking the progress of sth. like the implementation of an RFC
    T-libs-api[DEPRECATED; DO NOT USE]
    on Aug 6, 2023
  2. coastalwhite commented on Aug 25, 2023

    @coastalwhite
    ContributorAuthor

    Two additional points:

    1. Upcoming PRs should use the rustc_legacy_const_generics for immediate values instead.
    2. Prefer LLVM intrinsics to assembly. Intrinsics can be found here.
  3. coastalwhite commented on Sep 1, 2023

    @coastalwhite
    ContributorAuthor

    Entropy Source of the Cryptographic Scalar Extension are not implemented in LLVM. Therefore, it should be implemented with inline assembly and is not part of the implemented intrinsics.

  4. coastalwhite commented on Sep 1, 2023

    @coastalwhite
    ContributorAuthor

    Extensions such as Zfinx, Zdinx and Zhinx are all done by LLVM without intrinsics and therefore don't have to be done.

  5. added a commit that references this issue on Oct 30, 2023
  6. added
    O-riscvTarget: RISC-V architecture
    A-floating-pointArea: Floating point numbers and arithmetic
    A-SIMDArea: SIMD (Single Instruction Multiple Data)
    A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.
    on Nov 5, 2024
  7. added a commit that references this issue on Apr 2, 2025
  8. added a commit that references this issue on Apr 2, 2025
  9. 7 remaining items

  10. nia-e commented on Sep 22, 2026

    @nia-e
    Member

    The team discussed this in today's meeting and a variety of opinions were expressed, but the overall conclusion is that we'd like to hear from ecosystem users / risc-v people as to which is preferable. Either option is fine, but this kind of conversation is of course very prone to bikeshedding ^^

  11. removed
    I-libs-nominatedNominated for discussion during a libs team meeting.
    on Sep 22, 2026
  12. TechnoPorg commented on Sep 23, 2026

    @TechnoPorg
    Contributor

    Although this isn't a very weighty take, I figured I'd chime in to say that my work project uses the RV32 bit manipulation and crypto extensions (currently via inline assembly since we're on stable) and it's more ergonomic for us to work with u32 than usize.

  13. tgross35 commented on Oct 11, 2026

    @tgross35
    Member

    @topperc pointed out at rust-lang/stdarch#2247 (comment) that in C the 32- and 64-bit version of these intrinsics are separate and you can use both on riscv64. This seems worth following since applications that can use the 32-bit versions don't need to do anything special to work with both rv32 and rv64. @rust-lang/libs @newpavlov and others on this thread, any thoughts?

    More concretely, I think we should copy the table at https://github.com/riscv-non-isa/riscv-c-api-doc/blob/main/src/c-api.adoc#scalar-bit-manipulation-extension-intrinsics but drop the __riscv_ prefix as we have been. E.g. our existing clmulh(usize, usize) -> usize, available on both rv32 and rv64, will be split into clmulh_32(u32, u32) -> u32 available on both and clmulh_64(u64, u64) -> u64 which is 64-bit only.

    Re-nominating since this could use a bit of consensus.

    @rustbot label +I-libs-nominated

    Also did a quick check that the 32-bit intrinsics are still single instructions on 64-bit https://clang.godbolt.org/z/hYYYPvG6s.

  14. newpavlov commented on Oct 11, 2026

    @newpavlov
    Contributor

    This seems worth following since applications that can use the 32-bit versions don't need to do anything special to work with both rv32 and rv64.

    IIUC RV64 does not have a separate 32-bit clmul instruction (spec), so on the first glance I don't think we should add a separate intrinsic for it.

  15. tgross35 commented on Oct 11, 2026

    @tgross35
    Member

    That one is marked "Emulated with clmul+sext.w on RV64" in the table. I think it's fine to exclude those.

  16. TechnoPorg commented on Oct 12, 2026

    @TechnoPorg
    Contributor

    Personally, I would expect to see all (or almost all) instructions even if respective intrinsics are unlikely to be used in practice explicitly. For example, x86 has _bswap64 intrinsic which is equivalent to the missing rev8. But I guess the missing intrinsics could be added later. For now I am mostly interested in cryptographic intrinsics (i.e. Zk extensions).

    @newpavlov In rust-lang/stdarch#1453 and rust-lang/stdarch#1461 part of the review was saying not to implement those extra intrinsics and to let LLVM handle it. Would you still want to have them?

    On that note @tgross35, of the bit manipulation intrinsics we currently implement (xperm*, clmul*, orc_b, {un}zip), the 32-bit versions are all either RV32-only or emulated with multiple intrinsics, so there would only be shared intrinsics if we add the extra ones mentioned above.

  17. newpavlov commented on Oct 12, 2026

    @newpavlov
    Contributor

    In the case of order swapping intrinsics it may be useful to have them to be sure that code uses dedicated hardware instructions instead of relying on software emulation. In other words, explicitly using rev8 would force us to enable the required target feature, while with swap_bytes it could be easily forgotten. It also would be consistent with the aforementioned x86 intrinsic.

    I am not sure it's worth to add intrinsics for all instructions (especially those from the Zba extension), but to be on the safe side I would do it nevertheless without doing any value judgment. But it's not a strong opinion, so I am fine with skipping some instructions. They could be added later if there is a demand for them.

    cc @Amanieu

  18. topperc commented on Oct 12, 2026

    @topperc

    24. That one is marked "Emulated with clmul+sext.w on RV64" in the table. I think it's fine to exclude those.

    llvm can drop that sext.w in many cases. For example, if the result of the clmul is stored to a 32-bit location, there won't be a redundant a sext.w.

  19. nia-e commented on Oct 13, 2026

    @nia-e
    Member

    Per discussion in the libs meeting, let's stick to what the C spec says - so, separate u32 and u64. Thanks!

  20. removed
    I-libs-nominatedNominated for discussion during a libs team meeting.
    on Oct 13, 2026
  21. Amanieu commented on Oct 13, 2026

    @Amanieu
    Member

    To be clear: the conclusion we reached in the meeting is also that we should be precisely matching the C API with the __riscv_ prefix removed, as @tgross35 suggested. This means having separate versions with _32 and _64 suffixes, which we judged was important because the operation of these intrinsics is dependent on the operand size.

  22. tgross35 commented on Oct 27, 2026

    @tgross35
    Member

    That all got updated so our names and signatures are consistent with C. There is a stabilization PR at rust-lang/stdarch#2248 covering the batmanip and crypto tables at https://github.com/riscv-non-isa/riscv-c-api-doc/blob/b3df26527b2fa27d7219b6d6abe775f6bd13615b/src/c-api.adoc, I'm planning to propose FCP once rust-lang/stdarch#2254 merges so feel free to take a look.

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