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Merged
rust-bors merged 3 commits into from
Mar 11, 2026
Merged

scalable vector: type renames and simple checks #153653

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f760fdd
hir_analysis: check number of vectors in tuples
davidtwco Feb 19, 2026
db5e2dc
abi: s/ScalableVector/SimdScalableVector
davidtwco Mar 2, 2026
b767499
abi: s/VectorKind/SimdVectorKind
davidtwco Mar 2, 2026
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2 changes: 1 addition & 1 deletion compiler/rustc_abi/src/callconv.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -83,7 +83,7 @@ impl<'a, Ty> TyAndLayout<'a, Ty> {
}))
}

BackendRepr::ScalableVector { .. } => {
BackendRepr::SimdScalableVector { .. } => {
unreachable!("`homogeneous_aggregate` should not be called for scalable vectors")
}

Expand Down
20 changes: 10 additions & 10 deletions compiler/rustc_abi/src/layout.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -210,7 +210,7 @@ impl<Cx: HasDataLayout> LayoutCalculator<Cx> {
VariantIdx: Idx,
F: AsRef<LayoutData<FieldIdx, VariantIdx>> + fmt::Debug,
{
vector_type_layout(VectorKind::Scalable, self.cx.data_layout(), element, count)
vector_type_layout(SimdVectorKind::Scalable, self.cx.data_layout(), element, count)
}

pub fn simd_type<FieldIdx, VariantIdx, F>(
Expand All @@ -224,7 +224,7 @@ impl<Cx: HasDataLayout> LayoutCalculator<Cx> {
VariantIdx: Idx,
F: AsRef<LayoutData<FieldIdx, VariantIdx>> + fmt::Debug,
{
let kind = if repr_packed { VectorKind::PackedFixed } else { VectorKind::Fixed };
let kind = if repr_packed { SimdVectorKind::PackedFixed } else { SimdVectorKind::Fixed };
vector_type_layout(kind, self.cx.data_layout(), element, count)
}

Expand Down Expand Up @@ -484,7 +484,7 @@ impl<Cx: HasDataLayout> LayoutCalculator<Cx> {
BackendRepr::Scalar(..)
| BackendRepr::ScalarPair(..)
| BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::Memory { .. } => repr,
},
};
Expand Down Expand Up @@ -557,7 +557,7 @@ impl<Cx: HasDataLayout> LayoutCalculator<Cx> {
hide_niches(b);
}
BackendRepr::SimdVector { element, .. }
| BackendRepr::ScalableVector { element, .. } => hide_niches(element),
| BackendRepr::SimdScalableVector { element, .. } => hide_niches(element),
BackendRepr::Memory { sized: _ } => {}
}
st.largest_niche = None;
Expand Down Expand Up @@ -1524,7 +1524,7 @@ impl<Cx: HasDataLayout> LayoutCalculator<Cx> {
}
}

enum VectorKind {
enum SimdVectorKind {
/// `#[rustc_scalable_vector]`
Scalable,
/// `#[repr(simd, packed)]`
Expand All @@ -1534,7 +1534,7 @@ enum VectorKind {
}

fn vector_type_layout<FieldIdx, VariantIdx, F>(
kind: VectorKind,
kind: SimdVectorKind,
dl: &TargetDataLayout,
element: F,
count: u64,
Expand All @@ -1559,16 +1559,16 @@ where
let size =
elt.size.checked_mul(count, dl).ok_or_else(|| LayoutCalculatorError::SizeOverflow)?;
let (repr, align) = match kind {
VectorKind::Scalable => {
(BackendRepr::ScalableVector { element, count }, dl.llvmlike_vector_align(size))
SimdVectorKind::Scalable => {
(BackendRepr::SimdScalableVector { element, count }, dl.llvmlike_vector_align(size))
}
// Non-power-of-two vectors have padding up to the next power-of-two.
// If we're a packed repr, remove the padding while keeping the alignment as close
// to a vector as possible.
VectorKind::PackedFixed if !count.is_power_of_two() => {
SimdVectorKind::PackedFixed if !count.is_power_of_two() => {
(BackendRepr::Memory { sized: true }, Align::max_aligned_factor(size))
}
VectorKind::PackedFixed | VectorKind::Fixed => {
SimdVectorKind::PackedFixed | SimdVectorKind::Fixed => {
(BackendRepr::SimdVector { element, count }, dl.llvmlike_vector_align(size))
}
};
Expand Down
20 changes: 10 additions & 10 deletions compiler/rustc_abi/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1731,7 +1731,7 @@ impl AddressSpace {
pub enum BackendRepr {
Scalar(Scalar),
ScalarPair(Scalar, Scalar),
ScalableVector {
SimdScalableVector {
element: Scalar,
count: u64,
},
Expand All @@ -1758,7 +1758,7 @@ impl BackendRepr {
// fully implemented, scalable vectors will remain `Sized`, they just won't be
// `const Sized` - whether `is_unsized` continues to return `false` at that point will
// need to be revisited and will depend on what `is_unsized` is used for.
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::SimdVector { .. } => false,
BackendRepr::Memory { sized } => !sized,
}
Expand Down Expand Up @@ -1801,7 +1801,7 @@ impl BackendRepr {
// The align of a Vector can vary in surprising ways
BackendRepr::SimdVector { .. }
| BackendRepr::Memory { .. }
| BackendRepr::ScalableVector { .. } => None,
| BackendRepr::SimdScalableVector { .. } => None,
}
}

Expand All @@ -1825,7 +1825,7 @@ impl BackendRepr {
// The size of a Vector can vary in surprising ways
BackendRepr::SimdVector { .. }
| BackendRepr::Memory { .. }
| BackendRepr::ScalableVector { .. } => None,
| BackendRepr::SimdScalableVector { .. } => None,
}
}

Expand All @@ -1840,8 +1840,8 @@ impl BackendRepr {
BackendRepr::SimdVector { element: element.to_union(), count }
}
BackendRepr::Memory { .. } => BackendRepr::Memory { sized: true },
BackendRepr::ScalableVector { element, count } => {
BackendRepr::ScalableVector { element: element.to_union(), count }
BackendRepr::SimdScalableVector { element, count } => {
BackendRepr::SimdScalableVector { element: element.to_union(), count }
}
}
}
Expand Down Expand Up @@ -2085,7 +2085,7 @@ impl<FieldIdx: Idx, VariantIdx: Idx> LayoutData<FieldIdx, VariantIdx> {
match self.backend_repr {
BackendRepr::Scalar(_)
| BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. } => false,
| BackendRepr::SimdScalableVector { .. } => false,
BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => true,
}
}
Expand Down Expand Up @@ -2182,13 +2182,13 @@ impl<FieldIdx: Idx, VariantIdx: Idx> LayoutData<FieldIdx, VariantIdx> {

/// Returns `true` if the size of the type is only known at runtime.
pub fn is_runtime_sized(&self) -> bool {
matches!(self.backend_repr, BackendRepr::ScalableVector { .. })
matches!(self.backend_repr, BackendRepr::SimdScalableVector { .. })
}

/// Returns the elements count of a scalable vector.
pub fn scalable_vector_element_count(&self) -> Option<u64> {
match self.backend_repr {
BackendRepr::ScalableVector { count, .. } => Some(count),
BackendRepr::SimdScalableVector { count, .. } => Some(count),
_ => None,
}
}
Expand All @@ -2201,7 +2201,7 @@ impl<FieldIdx: Idx, VariantIdx: Idx> LayoutData<FieldIdx, VariantIdx> {
match self.backend_repr {
BackendRepr::Scalar(_)
| BackendRepr::ScalarPair(..)
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::SimdVector { .. } => false,
BackendRepr::Memory { sized } => sized && self.size.bytes() == 0,
}
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
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Expand Up @@ -505,7 +505,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
let layout = self.layout_of(tp_ty).layout;
let _use_integer_compare = match layout.backend_repr() {
Scalar(_) | ScalarPair(_, _) => true,
SimdVector { .. } | ScalableVector { .. } => false,
SimdVector { .. } | SimdScalableVector { .. } => false,
Memory { .. } => {
// For rusty ABIs, small aggregates are actually passed
// as `RegKind::Integer` (see `FnAbi::adjust_for_abi`),
Expand Down
6 changes: 3 additions & 3 deletions compiler/rustc_codegen_gcc/src/type_of.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ fn uncached_gcc_type<'gcc, 'tcx>(
);
}
BackendRepr::Memory { .. } => {}
BackendRepr::ScalableVector { .. } => todo!(),
BackendRepr::SimdScalableVector { .. } => todo!(),
}

let name = match *layout.ty.kind() {
Expand Down Expand Up @@ -181,7 +181,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
match self.backend_repr {
BackendRepr::Scalar(_) | BackendRepr::SimdVector { .. } => true,
// FIXME(rustc_scalable_vector): Not yet implemented in rustc_codegen_gcc.
BackendRepr::ScalableVector { .. } => todo!(),
BackendRepr::SimdScalableVector { .. } => todo!(),
BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => false,
}
}
Expand All @@ -191,7 +191,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
BackendRepr::ScalarPair(..) => true,
BackendRepr::Scalar(_)
| BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::Memory { .. } => false,
}
}
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_codegen_llvm/src/intrinsic.rs
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Expand Up @@ -493,7 +493,7 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
let use_integer_compare = match layout.backend_repr() {
Scalar(_) | ScalarPair(_, _) => true,
SimdVector { .. } => false,
ScalableVector { .. } => {
SimdScalableVector { .. } => {
tcx.dcx().emit_err(InvalidMonomorphization::NonScalableType {
span,
name: sym::raw_eq,
Expand Down
6 changes: 3 additions & 3 deletions compiler/rustc_codegen_llvm/src/type_of.rs
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Expand Up @@ -24,7 +24,7 @@ fn uncached_llvm_type<'a, 'tcx>(
let element = layout.scalar_llvm_type_at(cx, element);
return cx.type_vector(element, count);
}
BackendRepr::ScalableVector { ref element, count } => {
BackendRepr::SimdScalableVector { ref element, count } => {
let element = if element.is_bool() {
cx.type_i1()
} else {
Expand Down Expand Up @@ -187,7 +187,7 @@ impl<'tcx> LayoutLlvmExt<'tcx> for TyAndLayout<'tcx> {
match self.backend_repr {
BackendRepr::Scalar(_)
| BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. } => true,
| BackendRepr::SimdScalableVector { .. } => true,
BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => false,
}
}
Expand All @@ -197,7 +197,7 @@ impl<'tcx> LayoutLlvmExt<'tcx> for TyAndLayout<'tcx> {
BackendRepr::ScalarPair(..) => true,
BackendRepr::Scalar(_)
| BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::Memory { .. } => false,
}
}
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_codegen_llvm/src/va_arg.rs
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Expand Up @@ -551,7 +551,7 @@ fn emit_x86_64_sysv64_va_arg<'ll, 'tcx>(
registers_for_primitive(scalar1.primitive());
registers_for_primitive(scalar2.primitive());
}
BackendRepr::SimdVector { .. } | BackendRepr::ScalableVector { .. } => {
BackendRepr::SimdVector { .. } | BackendRepr::SimdScalableVector { .. } => {
// Because no instance of VaArgSafe uses a non-scalar `BackendRepr`.
unreachable!(
"No x86-64 SysV va_arg implementation for {:?}",
Expand Down Expand Up @@ -692,7 +692,7 @@ fn emit_x86_64_sysv64_va_arg<'ll, 'tcx>(
}
// The Previous match on `BackendRepr` means control flow already escaped.
BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::Memory { .. } => unreachable!(),
};

Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_codegen_ssa/src/mir/operand.rs
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Expand Up @@ -404,7 +404,7 @@ impl<'a, 'tcx, V: CodegenObject> OperandRef<'tcx, V> {
}
BackendRepr::ScalarPair(_, _)
| BackendRepr::Memory { .. }
| BackendRepr::ScalableVector { .. } => bug!(),
| BackendRepr::SimdScalableVector { .. } => bug!(),
})
};

Expand Down Expand Up @@ -691,7 +691,7 @@ impl<'a, 'tcx, V: CodegenObject> OperandRefBuilder<'tcx, V> {
BackendRepr::ScalarPair(a, b) => {
OperandValueBuilder::Pair(Either::Right(a), Either::Right(b))
}
BackendRepr::SimdVector { .. } | BackendRepr::ScalableVector { .. } => {
BackendRepr::SimdVector { .. } | BackendRepr::SimdScalableVector { .. } => {
OperandValueBuilder::Vector(Either::Right(()))
}
BackendRepr::Memory { .. } => {
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_const_eval/src/interpret/place.rs
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Expand Up @@ -904,7 +904,7 @@ where
}
// Everything else can only exist in memory anyway, so it doesn't matter.
BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::Memory { .. } => true,
};

Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_const_eval/src/interpret/validity.rs
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Expand Up @@ -1331,7 +1331,7 @@ impl<'rt, 'tcx, M: Machine<'tcx>> ValueVisitor<'tcx, M> for ValidityVisitor<'rt,
self.visit_scalar(b, b_layout)?;
}
}
BackendRepr::SimdVector { .. } | BackendRepr::ScalableVector { .. } => {
BackendRepr::SimdVector { .. } | BackendRepr::SimdScalableVector { .. } => {
// No checks here, we assume layout computation gets this right.
// (This is harder to check since Miri does not represent these as `Immediate`. We
// also cannot use field projections since this might be a newtype around a vector.)
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_const_eval/src/util/check_validity_requirement.rs
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Expand Up @@ -119,7 +119,7 @@ fn check_validity_requirement_lax<'tcx>(
}
BackendRepr::SimdVector { element: s, count } => count == 0 || scalar_allows_raw_init(s),
BackendRepr::Memory { .. } => true, // Fields are checked below.
BackendRepr::ScalableVector { element, .. } => scalar_allows_raw_init(element),
BackendRepr::SimdScalableVector { element, .. } => scalar_allows_raw_init(element),
};

if !valid {
Expand Down
13 changes: 11 additions & 2 deletions compiler/rustc_hir_analysis/src/check/check.rs
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Expand Up @@ -1489,8 +1489,17 @@ fn check_scalable_vector(tcx: TyCtxt<'_>, span: Span, def_id: LocalDefId, scalab
return;
}
ScalableElt::Container if fields.is_empty() => {
let mut err =
tcx.dcx().struct_span_err(span, "scalable vectors must have a single field");
let mut err = tcx
.dcx()
.struct_span_err(span, "scalable vector tuples must have at least one field");
err.help("tuples of scalable vectors can only contain multiple of the same scalable vector type");
err.emit();
return;
}
ScalableElt::Container if fields.len() > 8 => {
let mut err = tcx
.dcx()
.struct_span_err(span, "scalable vector tuples can have at most eight fields");
err.help("tuples of scalable vectors can only contain multiple of the same scalable vector type");
err.emit();
return;
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_mir_transform/src/gvn.rs
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Expand Up @@ -1699,7 +1699,7 @@ impl<'body, 'a, 'tcx> VnState<'body, 'a, 'tcx> {
!a.is_always_valid(&self.ecx) || !b.is_always_valid(&self.ecx)
}
BackendRepr::SimdVector { .. }
| BackendRepr::ScalableVector { .. }
| BackendRepr::SimdScalableVector { .. }
| BackendRepr::Memory { .. } => false,
}
}
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_monomorphize/src/mono_checks/abi_check.rs
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Expand Up @@ -36,7 +36,7 @@ fn passes_vectors_by_value(mode: &PassMode, repr: &BackendRepr) -> UsesVectorReg
UsesVectorRegisters::FixedVector
}
PassMode::Direct(..) | PassMode::Pair(..)
if matches!(repr, BackendRepr::ScalableVector { .. }) =>
if matches!(repr, BackendRepr::SimdScalableVector { .. }) =>
{
UsesVectorRegisters::ScalableVector
}
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_public/src/unstable/convert/stable/abi.rs
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Expand Up @@ -265,7 +265,7 @@ impl<'tcx> Stable<'tcx> for rustc_abi::BackendRepr {
rustc_abi::BackendRepr::SimdVector { element, count } => {
ValueAbi::Vector { element: element.stable(tables, cx), count }
}
rustc_abi::BackendRepr::ScalableVector { element, count } => {
rustc_abi::BackendRepr::SimdScalableVector { element, count } => {
ValueAbi::ScalableVector { element: element.stable(tables, cx), count }
}
rustc_abi::BackendRepr::Memory { sized } => ValueAbi::Aggregate { sized },
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/callconv/loongarch.rs
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Expand Up @@ -88,7 +88,7 @@ where
BackendRepr::SimdVector { .. } => {
return Err(CannotUseFpConv);
}
BackendRepr::ScalableVector { .. } => panic!("scalable vectors are unsupported"),
BackendRepr::SimdScalableVector { .. } => panic!("scalable vectors are unsupported"),
BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => match arg_layout.fields {
FieldsShape::Primitive => {
unreachable!("aggregates can't have `FieldsShape::Primitive`")
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_target/src/callconv/mod.rs
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Expand Up @@ -392,7 +392,7 @@ impl<'a, Ty> ArgAbi<'a, Ty> {
),
BackendRepr::SimdVector { .. } => PassMode::Direct(ArgAttributes::new()),
BackendRepr::Memory { .. } => Self::indirect_pass_mode(&layout),
BackendRepr::ScalableVector { .. } => PassMode::Direct(ArgAttributes::new()),
BackendRepr::SimdScalableVector { .. } => PassMode::Direct(ArgAttributes::new()),
};
ArgAbi { layout, mode }
}
Expand Down Expand Up @@ -878,7 +878,7 @@ where
matches!(layout.variants, Variants::Single { .. }) && fields_are_noundef(layout, cx)
}
},
BackendRepr::SimdVector { .. } | BackendRepr::ScalableVector { .. } => false,
BackendRepr::SimdVector { .. } | BackendRepr::SimdScalableVector { .. } => false,
}
}

Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/callconv/riscv.rs
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Expand Up @@ -91,7 +91,7 @@ where
}
}
},
BackendRepr::SimdVector { .. } | BackendRepr::ScalableVector { .. } => {
BackendRepr::SimdVector { .. } | BackendRepr::SimdScalableVector { .. } => {
return Err(CannotUseFpConv);
}
BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => match arg_layout.fields {
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/callconv/sparc64.rs
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Expand Up @@ -65,7 +65,7 @@ fn classify<'a, Ty, C>(
Primitive::Int(_, _) | Primitive::Pointer(_) => { /* pass in integer registers */ }
},
BackendRepr::SimdVector { .. } => {}
BackendRepr::ScalableVector { .. } => {}
BackendRepr::SimdScalableVector { .. } => {}
BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => match arg_layout.fields {
FieldsShape::Primitive => {
unreachable!("aggregates can't have `FieldsShape::Primitive`")
Expand Down
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