The goal of this project is to build a processor (SoC) based on RISC-V that is suitable for use in laptops and desktop personal computers, aiming to match the performance, graphics capabilities, and power efficiency of Apple's M1 chip. Furthermore, every component within this SoC will consist entirely of open-source IP; this will allow anyone in the world to freely download, modify, and manufacture their own chips, thereby enabling the construction of a completely open-source hardware and software computing stack.
- Utilize the RISC-V open instruction set architecture. No non-openly licensed IP shall be used.
- Achieve performance levels—specifically regarding CPU performance, GPU performance, and power consumption—comparable to those of the Apple M1 chip.
- Support open-source EDA tools and open PDK workflows.
- Successfully complete independent tape-outs at fabrication facilities located in three different regions across the globe.
- Deliver no fewer than one thousand laptop or desktop computers prior to the Spring Festival of the Jiyou year (February 13, 2029).
- February 13, 2029 (TBD)
- TBA
- @lazyparser (Wu Wei): Lead of the Jiachen Initiative.
- TBA (Sponsorship opportunities are not currently open.)
- As a component of the Jiachen Initiative, the Tushan Project will be organized and maintained by the Lead of the Jiachen Initiative during its first year of operation.
- A new open-source foundation is tentatively planned to be established (within one year) to support this project and its derivative open-source initiatives; once the foundation is established, the project is slated to transition into the foundation's incubation program.
- QSoC - Quick System on Chip Studio https://github.com/vowstar/qsoc
- XiangShan RISC-V High-Performance IP Project: https://github.com/OpenXiangShan/XiangShan
- iEDA and ECOS Team: https://github.com/openecos-projects
- Vortex OpenGPU: https://github.com/vortexgpgpu/
Reference: https://zh.wikipedia.org/zh-cn/%E6%B6%82%E5%B1%B1%E4%B9%8B%E4%BC%9A