cleanup readme

README.md

@@ -21,48 +21,9 @@ Key highlights of the RISC-V Atom projects are are listed below:
 - Open source under [MIT License](https://en.wikipedia.org/wiki/MIT_License).  
 
 
-> ***To checkout this project, Please refer to the [Getting Started Guide](https://riscv-atom.readthedocs.io/en/latest/pages/getting-started/riscv-atom.html)***:
-
+> ***To checkout this project, Please refer to the [Getting Started Guide](https://riscv-atom.readthedocs.io/en/latest/pages/getting-started/riscv-atom.html)***.
 > ***Use the `dev` branch, if you like to see the latest additions to the project***
 
-## Directory Structure
-
-- `docs` : RISCV-Atom documentation: ([readthedocs](https://riscv-atom.readthedocs.io/en/latest/index.html))
-
-- `rtl` : Verilog sources.
-  - `core` : RISCV-Atom core components.
-  - `uncore` : RISCV-Atom non-core components (peripherals).
-  - `dpi` : SystemVerilog DPI sources.
-  - `soc` :  SoC implementations
-  - `tb` : Testbenches
-
-- `scripts` : utility scripts.
-
-- `sim` : Atomsim source code.
-  - `build` : Atomsim build files (autogenerated).
-  - `docs` : Doxygen Documentation for Atomsim source code.
-  - `include` : external libraries for atomsim.
-
-- `sw` : RISCV-Atom software sources
-  - `bootloader` :  RISC-V Atom bootloader.
-  - `examples` : RISCV-Atom examples
-  - `lib` : libc for RISCV-Atom
-    - `include` : libcatom headers
-    - `libcatom` : libcatom sources
-    - `link` : RISC-V Atom linker scripts
-
-- `synth` :
-  - `xilinx`: Synthesis project for xilinx FPGAs
-  - `yosys` : Yosys synthesis scripts
-
-- `test` : RISCV Atom tests
-  - `riscv-target` : Official RISC-V compliance test files
-  - `scar` : SCAR tests directory
-
-- `tools` : utility tools
-  - `elfdump` : elfdump utility
-
-
 ## Useful Links
 1. [Project Website](https://sites.google.com/view/saurabh-singh-web/projects/risc-v-atom?authuser=0)
 2. [Project Documentation](https://riscv-atom.readthedocs.io/en/latest/index.html)