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Merge pull request #14 from saurabhsingh99100/riscv-compliance
Add riscv compliance test support
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// RISC-V Compliance IO Test Header File | ||
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/* | ||
* Copyright (c) 2005-2018 Imperas Software Ltd., www.imperas.com | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, | ||
* either express or implied. | ||
* | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
* | ||
*/ | ||
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#ifndef _COMPLIANCE_IO_H | ||
#define _COMPLIANCE_IO_H | ||
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//----------------------------------------------------------------------- | ||
// RV IO Macros (Non functional) | ||
//----------------------------------------------------------------------- | ||
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#define RVTEST_IO_INIT | ||
#define RVTEST_IO_WRITE_STR(_SP, _STR) | ||
#define RVTEST_IO_CHECK() | ||
//#define RVTEST_IO_ASSERT_GPR_EQ(_SP, _R, _I) | ||
//#define RVTEST_IO_ASSERT_SFPR_EQ(_F, _R, _I) | ||
//#define RVTEST_IO_ASSERT_DFPR_EQ(_D, _R, _I) | ||
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#endif // _COMPLIANCE_IO_H |
22 changes: 22 additions & 0 deletions
22
test/riscv-target/atombones/device/rv32i_m/I/Makefile.include
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TARGET_SIM ?= atomsim | ||
ifeq ($(shell command -v $(TARGET_SIM) 2> /dev/null),) | ||
$(error Target simulator executable '$(TARGET_SIM)` not found) | ||
endif | ||
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RUN_TARGET= $(TARGET_SIM) --maxitr=100000000 --signature=$(*).signature.output $(<) > $@ | ||
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#RUN_TARGET= $(TARGET_SIM) --maxitr=100000000 $(<) > $(*).signature.output | ||
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RISCV_PREFIX ?= riscv64-unknown-elf- | ||
RISCV_GCC ?= $(RISCV_PREFIX)gcc | ||
RISCV_OBJCOPY ?= $(RISCV_PREFIX)objcopy | ||
RISCV_OBJDUMP ?= $(RISCV_PREFIX)objdump | ||
RISCV_GCC_OPTS ?= -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -march=rv32i -mabi=ilp32 | ||
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COMPILE_TARGET=\ | ||
$$(RISCV_GCC) $(1) $$(RISCV_GCC_OPTS) \ | ||
-I$(ROOTDIR)/riscv-test-env/ \ | ||
-I$(TARGETDIR)/$(RISCV_TARGET)/ \ | ||
-T$(TARGETDIR)/$(RISCV_TARGET)/link.ld $$< \ | ||
-o $$@; \ | ||
$$(RISCV_OBJDUMP) -D $$@ > [email protected]; \ |
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OUTPUT_ARCH( "riscv" ) | ||
ENTRY(_start) | ||
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SECTIONS | ||
{ | ||
. = 0x00000000; | ||
.text.init : { *(.text.init) } | ||
. = ALIGN(0x1000); | ||
.tohost : { *(.tohost) } | ||
. = ALIGN(0x1000); | ||
.text : { *(.text) } | ||
. = ALIGN(0x1000); | ||
.data : { *(.data) } | ||
.data.string : { *(.data.string)} | ||
.bss : { *(.bss) } | ||
_end = .; | ||
} |
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