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bootloader: refactor
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saursin committed Dec 25, 2023
1 parent 13fda81 commit efdcf9e
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Showing 5 changed files with 73 additions and 48 deletions.
2 changes: 1 addition & 1 deletion sw/bootloader/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ SRCS:= main.c crt0.S target/$(soctarget)/boot.c
RVPREFIX:= riscv64-unknown-elf
CFLAGS:= -march=$(shell cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a isa)
CFLAGS+= -mabi=$(shell cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a abi)
CFLAGS+= -nostartfiles -ffreestanding -g -Os
CFLAGS+= -Wall -nostartfiles -ffreestanding -g -Os
CFLAGS+= -I $(RVATOM_LIB)/include -I include
CFLAGS+= $(shell cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -d)
CFLAGS+= -DTARGET_$(shell echo $(soctarget) | tr 'a-z' 'A-Z')
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13 changes: 6 additions & 7 deletions sw/bootloader/include/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,14 +13,13 @@
#endif

// Return codes
#define RCODE_OK 0
#define RCODE_EXCEPTION 1
#define RCODE_UNREACHABLE 2
#define RCODE_INIT_FAIL 3
#define RCODE_FLASHBOOT_FAIL 4
#define RCODE_OK 0
#define RCODE_EXCEPTION 1
#define RCODE_UNREACHABLE 2
#define RCODE_INIT_FAIL 3
#define RCODE_FLASHBOOT_INVALID_DEVICE 4
#define RCODE_FLASHBOOT_COPY_FAIL 5

void puthex(unsigned val);

void __attribute__((noreturn)) boot_panic(int code);

void * platform_init();
9 changes: 6 additions & 3 deletions sw/bootloader/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,11 @@ void boot_panic(int code){
case RCODE_INIT_FAIL:
puts("init fail");
break;
case RCODE_FLASHBOOT_FAIL:
puts("flashboot fail; nospi");
case RCODE_FLASHBOOT_INVALID_DEVICE:
puts("flashboot: invalid device");
break;
case RCODE_FLASHBOOT_COPY_FAIL:
puts("flashboot: no spi IP");
break;
default:
puts("unknown");
Expand All @@ -51,7 +54,7 @@ int main(){
#ifdef CLS_AT_START
P(putchar(0x1b); putchar('c');) // clear screen
#else
P('\n');
P(putchar('\n'));
#endif

// Print header
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5 changes: 2 additions & 3 deletions sw/bootloader/target/hydrogensoc/boot.c
Original file line number Diff line number Diff line change
Expand Up @@ -91,11 +91,10 @@ void * platform_init(){
switch (bootmode)
{
case BOOTMODE_FLASHBOOT:
P(puts("flashboot: copying from " EXPAND_AND_STRINGIFY(FLASH_IMG_OFFSET) "\n");)
#ifdef SOC_EN_SPI
flashcpy((uint8_t *)&__approm_start, FLASH_IMG_OFFSET, FLASH_IMG_SIZE);
flashboot((uint8_t *)&__approm_start, FLASH_IMG_OFFSET, FLASH_IMG_SIZE);
#else
boot_panic(RCODE_FLASHBOOT_FAIL);
boot_panic(RCODE_FLASHBOOT_COPY_FAIL);
#endif
break;

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92 changes: 58 additions & 34 deletions sw/bootloader/target/hydrogensoc/flashboot.h
Original file line number Diff line number Diff line change
@@ -1,60 +1,84 @@
#pragma once

#include "common.h"

#include <stdint.h>
#include <spi.h>
#include <utils.h>
#include <mmio.h>

// Flash definitions
#define FLASH_CMD_READ 0x03
#define FLASH_CMD_READ 0x03
#define FLASH_CMD_READID 0X9f
#define SPI_REG_SCKDIV_OFFSET 0x00
#define SPI_REG_SCTRL_OFFSET 0x04
#define SPI_REG_TDATA_OFFSET 0x08
#define SPI_REG_RDATA_OFFSET 0x0c
#define SPI_REG_CSCTRL_OFFSET 0x10
#define SPI_REG_DCTRL_OFFSET 0x14

/**
* @brief Copies Data from FLAST to dest
*
* @param dest dest buffer
* @param src_addr source address in flash
* @param len
* @return int
*/
int flashcpy(uint8_t *dest, uint32_t src_addr, uint32_t len) {
struct SPI_Config cfg = {
.base_addr = SPI_ADDR,
.enable = true,
.pha = false,
.pol = false,
.lsb_first = false,
.baudrate = 1000000,
.device_num = 0,
.cs_mode = CSMODE_DISABLE,
.post_cs_low_delay = 1,
.pre_cs_high_delay = 1,
.loopback_enable=false
};
spi_init(&cfg);
char flashgetid(struct SPI_Config *cfg){
// select
REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET) = bitset(REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET), 24+cfg->device_num);
spi_transfer(cfg, FLASH_CMD_READID);
char id = spi_transfer(cfg, 0x0);
// deselect
REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET) = bitclear(REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET), 24+cfg->device_num);
return id;
}

int flashcpy(struct SPI_Config *cfg, uint8_t *dest, uint32_t src_addr, uint32_t len) {
// select
REG32(cfg.base_addr, SPI_REG_CSCTRL_OFFSET) = bitset(REG32(cfg.base_addr, SPI_REG_CSCTRL_OFFSET), 24+cfg.device_num);
spi_transfer(&cfg, FLASH_CMD_READ);
spi_transfer(&cfg, src_addr >> 16);
spi_transfer(&cfg, src_addr >> 8);
spi_transfer(&cfg, src_addr);
REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET) = bitset(REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET), 24+cfg->device_num);
spi_transfer(cfg, FLASH_CMD_READ);
spi_transfer(cfg, src_addr >> 16);
spi_transfer(cfg, src_addr >> 8);
spi_transfer(cfg, src_addr);

while(len--) {
REG8(cfg.base_addr, SPI_REG_TDATA_OFFSET) = 0x0;
REG8(cfg->base_addr, SPI_REG_TDATA_OFFSET) = 0x0;
while(REG32(SPI_ADDR, SPI_REG_SCTRL_OFFSET) >> 31)
asm volatile("");
*(dest++) = REG8(cfg.base_addr, SPI_REG_RDATA_OFFSET);
*(dest++) = REG8(cfg->base_addr, SPI_REG_RDATA_OFFSET);
}

// deselect
REG32(cfg.base_addr, SPI_REG_CSCTRL_OFFSET) = bitclear(REG32(cfg.base_addr, SPI_REG_CSCTRL_OFFSET), 24+cfg.device_num);
REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET) = bitclear(REG32(cfg->base_addr, SPI_REG_CSCTRL_OFFSET), 24+cfg->device_num);
return 0;
}

void flashboot(uint8_t *dest, uint32_t src_addr, uint32_t len) {
// Init
struct SPI_Config cfg = {
cfg.base_addr = SPI_ADDR,
cfg.enable = true,
cfg.pha = false,
cfg.pol = false,
cfg.lsb_first = false,
cfg.baudrate = 1000000,
cfg.device_num = 0,
cfg.cs_mode = CSMODE_DISABLE,
cfg.post_cs_low_delay = 1,
cfg.pre_cs_high_delay = 1,
cfg.loopback_enable=false
};
spi_init(&cfg);

// Check ID
uint8_t manufacturer_id = flashgetid(&cfg);
P(puts("flashboot: manuf id = 0x");)
P(puthex(manufacturer_id);)
P(putchar('\n');)
if(manufacturer_id == 0x00 || manufacturer_id == 0xff){
boot_panic(RCODE_FLASHBOOT_INVALID_DEVICE);
}

// Copy
P(puts("\nflashboot: copying from " EXPAND_AND_STRINGIFY(FLASH_IMG_OFFSET));)
flashcpy(&cfg, dest, src_addr, len);
P(puts(" - OK\n");)

// Deinit
cfg.cs_mode = CSMODE_AUTO;
spi_init(&cfg);
return 0;
}
}

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