Verilog Modules

This repository contains fundamental modules of a digital circuit written in Verilog.

Table of Contents

Modules

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
DFF.v		DFF.v
DFF_AsyncClear.v		DFF_AsyncClear.v
DFF_SyncClear.v		DFF_SyncClear.v
FA.v		FA.v
HA.v		HA.v
JKFF.v		JKFF.v
JKFF_AsyncClear.v		JKFF_AsyncClear.v
JKFF_SyncClear.v		JKFF_SyncClear.v
README.md		README.md
TFF.v		TFF.v
TFF_AsyncClear.v		TFF_AsyncClear.v
TFF_SyncClear.v		TFF_SyncClear.v
barrelShifterNBit.v		barrelShifterNBit.v
boothMultiplier4Bit.v		boothMultiplier4Bit.v
clkDivider.v		clkDivider.v
clock.v		clock.v
dLatch.v		dLatch.v
deMUX1To2n.v		deMUX1To2n.v
designExampleDDMano.v		designExampleDDMano.v
fifo.v		fifo.v
lfsr.v		lfsr.v
memory.v		memory.v
mux2nTo1.v		mux2nTo1.v
nBitCarryLookAheadAdder.v		nBitCarryLookAheadAdder.v
nBitCounter.v		nBitCounter.v
nBitJohnsonCounter.v		nBitJohnsonCounter.v
nBitRippleCarryAdder.v		nBitRippleCarryAdder.v
nBitShiftRegister.v		nBitShiftRegister.v
patternDetector.v		patternDetector.v
serialParallelMultiplier4Bit.v		serialParallelMultiplier4Bit.v
switchDebouncer.v		switchDebouncer.v
testbench.v		testbench.v
twoComplementer.v		twoComplementer.v
wallaceTreeMultiplier8Bit.v		wallaceTreeMultiplier8Bit.v