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libsel4vm, x86: interrupt model improvements#86

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andybui01:andyb/x86_vmm
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libsel4vm, x86: interrupt model improvements#86
andybui01 wants to merge 5 commits intoseL4:masterfrom
andybui01:andyb/x86_vmm

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@andybui01
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@andybui01 andybui01 commented Nov 18, 2022

This PR attempts to do the following:

  • Patch up flaky ACPI table support
  • Complete the APIC emulation code. In its current state the emulated APIC is not completed and used.
  • Add support for Message Signaled Interrupts (MSIs). This allows a greater range of devices to be supported without the need for IOAPIC emulation (a bit harder to set up due to the DSDT and AML bytecode. Although I think dornerworks have an attempt at this?)
  • WIP: APIC timer support, mostly works just probabilistic and freezes up here and there.

An example CAmkES app configuration can be found here: https://github.com/andybui01/camkes-vm-examples/blob/andyb/supermicro_msi/apps/x86/supermicro/supermicro.camkes

A working manifest for the supermicro board can also be found here: https://github.com/andybui01/camkes-vm-examples-manifest/blob/andyb/supermicro_msi/master.xml

@andybui01 andybui01 changed the title x86 interrupt improvements libsel4vm, x86: interrupt model improvements Nov 18, 2022
@andybui01 andybui01 marked this pull request as draft November 18, 2022 05:33
@chrisguikema
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@andybui01 glad to see someone else has worked on this and released a version for the community!

I noticed you mentioned DornerWorks in the PR, and you're right that we did some work on this topic, but our code can't be released yet :( What i've noticed is that MSIs don't need the IOAPIC for functionality, which is good, because adding IOAPIC support is a pain, due to needed to compile your own DSDT which needs to match the definitions in the .camkes file.

andybui01 added 5 commits May 12, 2023 14:21
Writing to a pci ioport currently double adds the offset to the
register. This was not picked up before as all writes were done to a
register with an offset of 0, so adding 0 again had no effect.

Signed-off-by: Andy Bui <andy.bui@unsw.edu.au>
The ACPI tables currently report addresses of follow on tables in terms
of the VMM's virtual address. This needs to be set to the guests'
physical address in order for the guest to interpret the tables
correctly.

Signed-off-by: Andy Bui <andy.bui@unsw.edu.au>
The current x86 apic emulation is very barebones and is not used. This
commit makes the apic the primary interrupt controller, backed up by the
i8259 PIC.

Signed-off-by: Andy Bui <andy.bui@unsw.edu.au>
This commit adds MSI support to the x86 VMM. It allows MSIs to be set up
by the guest, and includes code that intercepts MSI setup so the VMM can
ensure the guest OS is not programming the MSI to be sent to somewhere
it shouldn't be sent (e.g. another core or vm).

Signed-off-by: Andy Bui <andy.bui@unsw.edu.au>
Every apic has a timer and guest OS' generally expect the existence of
the apic timer if there is an apic. This commit attempts to add apic
timer emulation.

It works sometimes (TM), but there is currently a bug where the timer
interrupt arrives in the VMM but does not make it to the guest (even
though it does before). This behaviour is also non-deterministic.

Signed-off-by: Andy Bui <andy.bui@unsw.edu.au>
@chrisguikema
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@andybui01 can you explain the non-deterministic behavior you're seeing with the lapic timer? I pulled this into a code base that is running real-time Linux, and the timer seemed to initialize properly, but then stop triggering during the boot process. I'm unsure of whether that is Linux stopping the timer for some reason, or the behavior you noticed.

@andybui01
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@andybui01 can you explain the non-deterministic behavior you're seeing with the lapic timer? I pulled this into a code base that is running real-time Linux, and the timer seemed to initialize properly, but then stop triggering during the boot process. I'm unsure of whether that is Linux stopping the timer for some reason, or the behavior you noticed.

Hi, thanks for having a look. It's been a while since I worked on this, I remember it would work sometimes and then a fresh boot would freeze things up. I never investigated beyond this.

@chrisguikema
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I looked into this a bit, and on my boot, Linux is switching to oneshot mode, and the time server is never set to trigger an event.

@chrisguikema
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@andybui01 quick question - where was the reference for the lapic timer? KVM?

@andybui01
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@andybui01 quick question - where was the reference for the lapic timer? KVM?

Yep, KVM.

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