Tt atlantis #2
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Tt atlantis #2
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Ascalon supports Zkr and the SEED CSR. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
Ascalon supports Svadu (hardware A/D bit updates). QEMU makes Svadu and Svade mutually exclusive, remove Svadu so Ascalon comes up with Svadu working. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
JEP106 has two vendor IDs for Tenstorrent. We will use Bank 16, hex 0xa1: ((16 - 1) << 7) | (0xa1 & ~0x80) = 0x7a1 Add it to the Ascalon CPU definition as the mvendorid CSR. Signed-off-by: Joel Stanley <[email protected]>
Machines that have discontiguous memory may need to adjust where firmware and images are loaded at boot. Provide an interfaces for machines to describe a discontiguous low/high RAM scheme for this purpose. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
This loads firmware into the first (low) memory range, accounting for machines having discontiguous memory regions. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
The AIA init will be used by any server class riscv machine. Separate it out in order to share code with such systems. Signed-off-by: Joel Stanley <[email protected]>
Instead of hard coding the number of IRQ sources used by the APLIC, pass it in as a parameter. This allows other machines to configure this as required. Signed-off-by: Joel Stanley <[email protected]>
The Tenstorrent Atlantis platform is a collaboration between Tenstorrent and CoreLab Technology. It is based on the Atlantis SoC, which includes the Ascalon-X CPU and other IP from Tenstorrent and CoreLab Technology. The Tenstorrent Ascalon-X is a high performance 64-bit RVA23 compliant RISC-V CPU. This adds the machine containing serial console, interrupt controllers and device tree support. qemu-system-riscv64 -M tt-atlantis -m 512M \ -kernel Image -initrd rootfs.cpio -nographic Signed-off-by: Joel Stanley <[email protected]> Co-Developed-by: Nicholas Piggin <[email protected]>
tt-atlantis is likely to use a generic ECAM compatible PCIe memory map, so gpex is not far off the OS programming model Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
Add OpenSBI and Linux boot tests for the tt-atlantis machine. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Hao Wu <[email protected]> Signed-off-by: Chris Rauer <[email protected]> Link: https://lore.kernel.org/qemu-devel/[email protected] [jms: rebase and minor build fixes for class_init and reset callback] Signed-off-by: Joel Stanley <[email protected]>
Now that we have the DesignWare model we can add buses to the tt-atlantis machine. Signed-off-by: Joel Stanley <[email protected]>
Add an I2C RTC device and a temperature sensor. These are not present on the board but help for testing. Signed-off-by: Joel Stanley <[email protected]>
It is possible that an ELF file can not be loaded, in that case the loader falls back to loading the file as a binary blob. Print a warning in this case because it is likely that it is not intended. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
OpenSBI hangs before any console output if the domain init code sees the next stage is not in an executable region. If no kernel payload is provided to QEMU, the next stage address is NULL, and the riscv virt machine memory map ends up covering the 0 address with the catch all S-mode RWX region and so OpenSBI prints console messages and does not hang until the next stage boot. The TT Atlantis address map has RAM starting at 0 and it loads OpenSBI there, so it is M-mode and not accessible by S-mode, tripping the early check and hang. Add a helper to set up a simple payload that gets OpenSBI messages to console. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
To avoid OpenSBI hanging with no messages if there is no kernel provided, add the simple payload in that case. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
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