All Files Linted

accelerators/catapult_hls/common/inc/core/systems/esp_dma_controller.hpp

@@ -6,123 +6,105 @@
 
 #include <mc_connections.h>
 
-template <
-    int _DMA_WIDTH_,
-    int _MEM_SIZE_
-    >
-class esp_dma_controller : public sc_module
-{
+template <int _DMA_WIDTH_, int _MEM_SIZE_> class esp_dma_controller : public sc_module {
 
-    public:
+  public:
+    // Input ports
 
-        // Input ports
+    // Clock signal
+    sc_in<bool> clk;
 
-        // Clock signal
-        sc_in<bool> clk;
+    // Reset signal
+    sc_in<bool> rst;
 
-        // Reset signal
-        sc_in<bool> rst;
+    // DMA read control (non blocking)
+    Connections::In<dma_info_t> dma_read_ctrl;
 
-        // DMA read control (non blocking)
-        Connections::In<dma_info_t> dma_read_ctrl;
+    // DMA write control (non blocking)
+    Connections::In<dma_info_t> dma_write_ctrl;
 
-        // DMA write control (non blocking)
-        Connections::In<dma_info_t> dma_write_ctrl;
+    // DMA write channel (blocking)
+    Connections::In<ac_int<DMA_WIDTH, true>> dma_write_chnl;
 
-        // DMA write channel (blocking)
-        Connections::In<ac_int<DMA_WIDTH,true>> dma_write_chnl;
+    // Accelerator done
+    sc_in<bool> acc_done;
 
-        // Accelerator done
-        sc_in<bool> acc_done;
+    // Output ports
 
-        // Output ports
+    // DMA read channel (blocking)
+    Connections::Out<ac_int<DMA_WIDTH, true>> dma_read_chnl;
 
-        // DMA read channel (blocking)
-        Connections::Out<ac_int<DMA_WIDTH,true>> dma_read_chnl;
+    // Accelerator reset
+    sc_out<bool> acc_rst;
 
-        // Accelerator reset
-        sc_out<bool> acc_rst;
+    // Constructor
+    SC_HAS_PROCESS(esp_dma_controller);
+    esp_dma_controller(sc_module_name name, ac_int<DMA_WIDTH, true> *ptr) :
+        sc_module(name), clk("clk"), rst("rst"), dma_read_ctrl("dma_read_ctrl"),
+        dma_write_ctrl("dma_write_ctrl"), dma_write_chnl("dma_write_chnl"),
+        dma_read_chnl("dma_read_chnl"), acc_done("acc_done"), acc_rst("acc_rst"),
+        num_of_write_burst(0), num_of_read_burst(0), total_write_bytes(0), total_read_bytes(0),
+        mem(ptr)
+    {
+        SC_THREAD(read);
+        sensitive << clk.pos();
+        async_reset_signal_is(rst, false);
 
-        // Constructor
-        SC_HAS_PROCESS(esp_dma_controller);
-        esp_dma_controller(sc_module_name name, ac_int<DMA_WIDTH,true> *ptr)
-            : sc_module(name)
-            , clk("clk")
-            , rst("rst")
-            , dma_read_ctrl("dma_read_ctrl")
-            , dma_write_ctrl("dma_write_ctrl")
-            , dma_write_chnl("dma_write_chnl")
-            , dma_read_chnl("dma_read_chnl")
-            , acc_done("acc_done")
-            , acc_rst("acc_rst")
-            , num_of_write_burst(0)
-            , num_of_read_burst(0)
-            , total_write_bytes(0)
-            , total_read_bytes(0)
-            , mem(ptr)
-        {
-            SC_THREAD(read);
-            sensitive << clk.pos();
-            async_reset_signal_is(rst, false);
+        SC_THREAD(write);
+        sensitive << clk.pos();
+        async_reset_signal_is(rst, false);
 
-            SC_THREAD(write);
-            sensitive << clk.pos();
-            async_reset_signal_is(rst, false);
+        SC_THREAD(res);
+        sensitive << clk.pos();
+        async_reset_signal_is(rst, false);
+    }
 
-            SC_THREAD(res);
-            sensitive << clk.pos();
-            async_reset_signal_is(rst, false);
+    // Process
 
-        }
+    // Handle requests
+    void read();
+    void write();
+    void res();
 
-        // Process
+    // Functions
 
-        // Handle requests
-        void read();
-        void write();
-        void res();
+    // Handle read requests
+    inline void dma_read(uint32_t mem_base, uint32_t burst_size);
 
-        // Functions
+    // Handle write requests
+    inline void dma_write(uint32_t mem_base, uint32_t burst_size);
 
-        // Handle read requests
-        inline void dma_read(uint32_t mem_base, uint32_t burst_size);
+    // Report information
 
-        // Handle write requests
-        inline void dma_write(uint32_t mem_base, uint32_t burst_size);
+    // End time of the first read burst
+    sc_time load_input_end;
 
-        // Report information
+    // End time of the first write burst
+    sc_time store_output_end;
 
-        // End time of the first read burst
-        sc_time load_input_end;
+    // Begin time of the first read burst
+    sc_time load_input_begin;
 
-        // End time of the first write burst
-        sc_time store_output_end;
+    // Begin time of the first write burst
+    sc_time store_output_begin;
 
-        // Begin time of the first read burst
-        sc_time load_input_begin;
+    // Number of dma write bursts
+    unsigned num_of_write_burst;
 
-        // Begin time of the first write burst
-        sc_time store_output_begin;
+    // Number of dma read bursts
+    unsigned num_of_read_burst;
 
-        // Number of dma write bursts
-        unsigned num_of_write_burst;
+    // Number of written bytes
+    unsigned total_write_bytes;
 
-        // Number of dma read bursts
-        unsigned num_of_read_burst;
-
-        // Number of written bytes
-        unsigned total_write_bytes;
-
-        // Number of read bytes
-        unsigned total_read_bytes;
-
-        // Memory pointer
-        ac_int<_DMA_WIDTH_> *mem;
+    // Number of read bytes
+    unsigned total_read_bytes;
 
+    // Memory pointer
+    ac_int<_DMA_WIDTH_> *mem;
 };
 
 // Implementation
 #include "esp_dma_controller.i.hpp"
 
 #endif // __ESP_DMA_CONTROLLER_HPP__
-

accelerators/catapult_hls/common/inc/esp_dma_info.hpp

@@ -25,7 +25,6 @@ struct dma_info_t {
 
     // Length
     ac_int<3, false> size;
-
 };
 
 #endif // __ESP_DMA_INFO_HPP__

accelerators/catapult_hls/crypto_cxx_catapult/hw/inc/aes/aes.h

@@ -3,19 +3,13 @@
 
 #include "defines.h"
 
-int aes(
-        uint32 oper_mode,
-        uint32 encryption,
-        uint32 key_bytes,
-        uint32 iv_bytes,
-        uint32 input_bytes,
-        uint32 aad_bytes,
-        uint32 tag_bytes,
-        uint32 key[AES_MAX_KEY_WORDS],    // input, max=8
-        uint32 iv[AES_MAX_IV_WORDS],      // input, max=4 (parameter for cbc, ctr, gcm only)
-        uint32 in[AES_MAX_IN_WORDS],      // input, max=40(ecb,cbc),16(ctr).32(gcm)
-        uint32 out[AES_MAX_IN_WORDS],     // output, max=40(ecb,cbc),16(ctr),32(gcm)
-        uint32 aad[AES_MAX_IN_WORDS],     // input, max=32 (parameter for gcm only)
-        uint32 tag[AES_MAX_IN_WORDS]);    // input/output, max=4 (parameter gcm only)
+int aes(uint32 oper_mode, uint32 encryption, uint32 key_bytes, uint32 iv_bytes, uint32 input_bytes,
+        uint32 aad_bytes, uint32 tag_bytes,
+        uint32 key[AES_MAX_KEY_WORDS], // input, max=8
+        uint32 iv[AES_MAX_IV_WORDS],   // input, max=4 (parameter for cbc, ctr, gcm only)
+        uint32 in[AES_MAX_IN_WORDS],   // input, max=40(ecb,cbc),16(ctr).32(gcm)
+        uint32 out[AES_MAX_IN_WORDS],  // output, max=40(ecb,cbc),16(ctr),32(gcm)
+        uint32 aad[AES_MAX_IN_WORDS],  // input, max=32 (parameter for gcm only)
+        uint32 tag[AES_MAX_IN_WORDS]); // input/output, max=4 (parameter gcm only)
 
 #endif /* __AES_H__ */

accelerators/catapult_hls/crypto_cxx_catapult/hw/inc/aes/modes/cbc.h

@@ -1,20 +1,15 @@
 #ifndef __CBC_H__
 #define __CBC_H__
 
+#include "../dec.h"
 #include "../defines.h"
-#include "../exp.h"
 #include "../enc.h"
-#include "../dec.h"
+#include "../exp.h"
 
 /* Cipher Block Chaining (CBC) */
 
-int aes_cbc_cipher(uint32 encryption,
-                   uint32 key_bytes,
-                   uint32 input_bytes,
-                   uint32 iv_bytes,
-                   uint32 ekey[AES_EXP_KEY_SIZE],
-                   uint32 iv[AES_MAX_IV_WORDS],
-                   uint32 in[AES_MAX_IN_WORDS],
-                   uint32 out[AES_MAX_IN_WORDS]);
+int aes_cbc_cipher(uint32 encryption, uint32 key_bytes, uint32 input_bytes, uint32 iv_bytes,
+                   uint32 ekey[AES_EXP_KEY_SIZE], uint32 iv[AES_MAX_IV_WORDS],
+                   uint32 in[AES_MAX_IN_WORDS], uint32 out[AES_MAX_IN_WORDS]);
 
 #endif /* __CBC_H__ */

accelerators/catapult_hls/crypto_cxx_catapult/hw/inc/conf_info.hpp

@@ -16,7 +16,7 @@ struct conf_info_t {
     uint32 aes_iv_bytes;
     uint32 aes_in_bytes;
     uint32 aes_key_bytes;
-    //uint32 aes_encryption;
+    // uint32 aes_encryption;
     uint32 aes_oper_mode;
     // sha2
     uint32 sha2_out_bytes;

accelerators/catapult_hls/crypto_cxx_catapult/hw/inc/sha1/defines.h

@@ -1,18 +1,18 @@
 #ifndef __SHA1_DEFINES_H__
 #define __SHA1_DEFINES_H__
 
+#include <assert.h>
+#include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
-#include <stdint.h>
-#include <assert.h>
 
-#define SHA1_HBLOCK_WORDS 5
-#define SHA1_CBLOCK_BYTES 64
-#define SHA1_CBLOCK_WORDS 16
+#define SHA1_HBLOCK_WORDS      5
+#define SHA1_CBLOCK_BYTES      64
+#define SHA1_CBLOCK_WORDS      16
 #define SHA1_CBLOCK_BYTES_MASK ~63
 
 #define SHA1_DIGEST_LENGTH 20
-#define SHA1_DIGEST_WORDS 5
+#define SHA1_DIGEST_WORDS  5
 
 #endif /* __DEFINES_H__ */

accelerators/catapult_hls/crypto_cxx_catapult/hw/inc/sha2/defines.h

@@ -1,20 +1,20 @@
 #ifndef __SHA2_DEFINES_H__
 #define __SHA2_DEFINES_H__
 
+#include <assert.h>
+#include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
-#include <stdint.h>
-#include <assert.h>
 
-#define SHA256_HBLOCK_WORDS 8
-#define SHA256_CBLOCK_BYTES 64
-#define SHA256_CBLOCK_WORDS 16
+#define SHA256_HBLOCK_WORDS      8
+#define SHA256_CBLOCK_BYTES      64
+#define SHA256_CBLOCK_WORDS      16
 #define SHA256_CBLOCK_BYTES_MASK ~63
 
-#define SHA512_HBLOCK_WORDS 8
-#define SHA512_CBLOCK_BYTES 128
-#define SHA512_CBLOCK_WORDS 32
+#define SHA512_HBLOCK_WORDS      8
+#define SHA512_CBLOCK_BYTES      128
+#define SHA512_CBLOCK_WORDS      32
 #define SHA512_CBLOCK_BYTES_MASK ~127
 
 #define SHA224_DIGEST_LENGTH 28