fix pre-commit tests

.gitignore

@@ -1,6 +1,8 @@
 *.prn
 *.log
 *.out
+env
+pre-commit-2.19.0
 
 # Byte-compiled / optimized / DLL files
 __pycache__/

README.md

@@ -74,7 +74,7 @@ Please contact [email protected] if you have any questions.
   Block Architecture:
    - Temperature-sensitive ring oscillator and stacked zero-VT devices.
     ![plot](./markdown%20images/tempSensor-BA.png)
-     Documentation **[link](https://fasoc.engin.umich.edu/thermal-sensor/)** 
+     Documentation **[link](https://fasoc.engin.umich.edu/thermal-sensor/)**
 
 
 
@@ -85,12 +85,9 @@ Please contact [email protected] if you have any questions.
     ![plot](./markdown%20images/LDO-BA.png)
     Documentation **[link](https://fasoc.engin.umich.edu/digital-ldo/)**
 
-**[dcdc-gen:-](https://github.com/idea-fasoc/OpenFASOC/tree/main/openfasoc/generators/dcdc-gen)** For synthesizable on-chip power management  circuits, we use the “2:1 SC Cell” auxiliary cell for implementing a switched-capacitor (SC) based DC-DC converter. By varying the number of auxiliary cells, we can achieve wide range of conversion ratios with fine grain resolution. It operates similarly to  a successive approximation analog to digital converter (SAR ADC). Furthermore, since the total structure is simply composed of auxiliary cells, it is ideal for the proposed flow of automating the analog block design.
+**[dcdc-gen:-](https://github.com/idea-fasoc/OpenFASOC/tree/main/openfasoc/generators/dcdc-gen)** For synthesizable on-chip power management  circuits, we use the “2:1 SC Cell” auxiliary cell for implementing a switched-capacitor (SC) based DC-DC converter. By varying the number of auxiliary cells, we can achieve wide range of conversion ratios with fine grain resolution. It operates similarly to  a successive approximation analog to digital converter (SAR ADC). Furthermore, since the total structure is simply composed of auxiliary cells, it is ideal for the proposed flow of automating the analog block design.  Documentation **[link](https://fasoc.engin.umich.edu/dc-dc-converter/)**
 
-
-   Documentation **[link](https://fasoc.engin.umich.edu/dc-dc-converter/)**
-
-**[cryo-gen:-](https://github.com/idea-fasoc/OpenFASOC/tree/main/openfasoc/generators/cryo-gen)** 
+**[cryo-gen:-](https://github.com/idea-fasoc/OpenFASOC/tree/main/openfasoc/generators/cryo-gen)**
 
 **[gdsfactory:-](https://github.com/idea-fasoc/OpenFASOC/tree/main/openfasoc/generators/gdsfactory)**
 

docs/README.md

@@ -1 +1 @@
-../README.md
+../README.md

openfasoc/common/platforms/sky130hd/patterns.rules

@@ -1 +1 @@
-../sky130hs/patterns.rules
+../sky130hs/patterns.rules

openfasoc/common/platforms/sky130hvl/gds/.magicrc

@@ -1 +1 @@
-/n/calumet/v/wbduan/google/wenbo/open_pdks_0331/sky130/sky130A/libs.tech/magic/sky130A.magicrc
+/n/calumet/v/wbduan/google/wenbo/open_pdks_0331/sky130/sky130A/libs.tech/magic/sky130A.magicrc

openfasoc/common/platforms/sky130hvl/patterns.rules

@@ -1 +1 @@
-../sky130hs/patterns.rules
+../sky130hs/patterns.rules

openfasoc/common/platforms/sky130osu18Tls/patterns.rules

@@ -1 +1 @@
-./../sky130osu18Ths/patterns.rules
+./../sky130osu18Ths/patterns.rules

openfasoc/common/platforms/sky130osu18Tms/patterns.rules

@@ -1 +1 @@
-./../sky130osu18Ths/patterns.rules
+./../sky130osu18Ths/patterns.rules