Serial flow control

CHANGELOG.md

@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
+ - Serial flow control enable
  - `i2c_scanner` example [#758]
  - Enable `sdio` for stm32f446
  - port LTDC implementation and example from stm32f7xx-hal [#731]

src/gpio/alt.rs

@@ -335,10 +335,10 @@ pub trait SerialSync {
     type Ck;
 }
 /// Hardware flow control (RS232)
-pub trait SerialRs232 {
-    /// Receive
+pub trait SerialFlowControl {
+    /// "Clear To Send" blocks the data transmission at the end of the current transfer when high
     type Cts;
-    /// Transmit
+    /// "Request to send" indicates that the USART is ready to receive a data (when low)
     type Rts;
 }
 

src/gpio/alt/f4.rs

@@ -4047,7 +4047,7 @@ pub mod usart1 {
     impl SerialSync for USART {
         type Ck = Ck;
     }
-    impl SerialRs232 for USART {
+    impl SerialFlowControl for USART {
         type Cts = Cts;
         type Rts = Rts;
     }
@@ -4103,7 +4103,7 @@ pub mod usart2 {
     impl SerialSync for USART {
         type Ck = Ck;
     }
-    impl SerialRs232 for USART {
+    impl SerialFlowControl for USART {
         type Cts = Cts;
         type Rts = Rts;
     }
@@ -4182,7 +4182,7 @@ pub mod usart3 {
     impl SerialSync for USART {
         type Ck = Ck;
     }
-    impl SerialRs232 for USART {
+    impl SerialFlowControl for USART {
         type Cts = Cts;
         type Rts = Rts;
     }
@@ -4293,7 +4293,7 @@ pub mod usart6 {
         feature = "gpio-f446",
         feature = "gpio-f469"
     ))]
-    impl SerialRs232 for USART {
+    impl SerialFlowControl for USART {
         type Cts = Cts;
         type Rts = Rts;
     }
@@ -4355,7 +4355,7 @@ pub mod uart4 {
         type Tx<Otype> = Tx<Otype>;
     }
     #[cfg(feature = "gpio-f446")]
-    impl SerialRs232 for UART {
+    impl SerialFlowControl for UART {
         type Cts = Cts;
         type Rts = Rts;
     }
@@ -4416,7 +4416,7 @@ pub mod uart5 {
         type Tx<Otype> = Tx<Otype>;
     }
     #[cfg(feature = "gpio-f446")]
-    impl SerialRs232 for UART {
+    impl SerialFlowControl for UART {
         type Cts = Cts;
         type Rts = Rts;
     }

src/serial/uart_impls.rs

@@ -6,12 +6,15 @@ use nb::block;
 use super::{
     config, CFlag, Error, Event, Flag, Rx, RxISR, RxListen, Serial, SerialExt, Tx, TxISR, TxListen,
 };
-use crate::dma::{
-    traits::{DMASet, PeriAddress},
-    MemoryToPeripheral, PeripheralToMemory,
-};
-use crate::gpio::{alt::SerialAsync as CommonPins, NoPin, PushPull};
+use crate::gpio::{alt::SerialAsync as CommonPins, NoPin, PushPull, SerialFlowControl};
 use crate::rcc::{self, Clocks};
+use crate::{
+    dma::{
+        traits::{DMASet, PeriAddress},
+        MemoryToPeripheral, PeripheralToMemory,
+    },
+    gpio::alt::SerialFlowControl,
+};
 
 #[cfg(feature = "uart4")]
 pub(crate) use crate::pac::uart4::RegisterBlock as RegisterBlockUart;
@@ -147,6 +150,9 @@ pub trait RegisterBlockImpl: crate::Sealed {
         self.listen_event(Some(Event::TxEmpty.into()), None)
     }
 
+    fn enable_rts(&self, state: bool);
+    fn enable_cts(&self, state: bool);
+
     // PeriAddress
     fn peri_address(&self) -> u32;
 }
@@ -260,6 +266,14 @@ macro_rules! uartCommon {
             });
         }
 
+        fn enable_rts(&self, state: bool) {
+            self.cr3().modify(|_, w| w.rtse().bit(state));
+        }
+
+        fn enable_cts(&self, state: bool) {
+            self.cr3().modify(|_, w| w.ctse().bit(state));
+        }
+
         fn peri_address(&self) -> u32 {
             self.dr().as_ptr() as u32
         }
@@ -513,6 +527,31 @@ where {
     uartCommon! {}
 }
 
+impl<UART: Instance + SerialFlowControl, WORD> Serial<UART, WORD> {
+    pub fn with_rts(self, rts: impl Into<UART::Rts>) -> Self {
+        self.rx.usart.enable_rts(true);
+        let _rts = rts.into();
+        self
+    }
+    pub fn with_cts(self, cts: impl Into<UART::Cts>) -> Self {
+        self.tx.usart.enable_cts(true);
+        let _cts = cts.into();
+        self
+    }
+    pub fn enable_request_to_send(&mut self) {
+        self.rx.usart.enable_rts(true);
+    }
+    pub fn disable_request_to_send(&mut self) {
+        self.rx.usart.enable_rts(false);
+    }
+    pub fn enable_clear_to_send(&mut self) {
+        self.tx.usart.enable_cts(true);
+    }
+    pub fn disable_clear_to_send(&mut self) {
+        self.tx.usart.enable_cts(false);
+    }
+}
+
 impl<UART: Instance, WORD> RxISR for Serial<UART, WORD>
 where
     Rx<UART, WORD>: RxISR,