Add Generic F723-F730-F733 Variants

README.md

@@ -383,8 +383,12 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :----: | :-------: | ---- | :-----: | :---- |
 | :green_heart: | STM32F722RC<br>STM32F722RE | Generic Board | *2.3.0* |  |
 | :green_heart:  | STM32F722ZC<br>STM32F722ZE | Generic Board | *2.4.0* |  |
-| :green_heart: | STM32F730R8<br>STM32F732RE | Generic Board | *2.3.0* |  |
+| :yellow_heart: | STM32F723IC<br>STM32F723IE | Generic Board | **2.7.0** |  |
+| :yellow_heart: | STM32F730I8K | Generic Board | **2.7.0** |  |
+| :green_heart: | STM32F730R8 | Generic Board | *2.3.0* |  |
+| :green_heart: | STM32F732RE | Generic Board | *2.3.0* |  |
 | :green_heart:  | STM32F732ZE | Generic Board | *2.4.0* |  |
+| :yellow_heart: | STM32F733IE<br> | Generic Board | **2.7.0** |  |
 | :green_heart: | STM32F745ZE<br>STM32F745ZG | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32F746BE<br>STM32F746BG<br>STM32F746NE<br>STM32F746NG | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32F746ZE<br>STM32F746ZG | Generic Board | *2.0.0* |  |

boards.txt

@@ -4628,6 +4628,46 @@ GenF7.menu.pnum.GENERIC_F722ZETX.build.board=GENERIC_F722ZETX
 GenF7.menu.pnum.GENERIC_F722ZETX.build.product_line=STM32F722xx
 GenF7.menu.pnum.GENERIC_F722ZETX.build.variant=STM32F7xx/F722Z(C-E)T_F732ZET
 
+# Generic F723ICKx
+GenF7.menu.pnum.GENERIC_F723ICKX=Generic F723ICKx
+GenF7.menu.pnum.GENERIC_F723ICKX.upload.maximum_size=262144
+GenF7.menu.pnum.GENERIC_F723ICKX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F723ICKX.build.board=GENERIC_F723ICKX
+GenF7.menu.pnum.GENERIC_F723ICKX.build.product_line=STM32F723xx
+GenF7.menu.pnum.GENERIC_F723ICKX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
+# Generic F723ICTx
+GenF7.menu.pnum.GENERIC_F723ICTX=Generic F723ICTx
+GenF7.menu.pnum.GENERIC_F723ICTX.upload.maximum_size=262144
+GenF7.menu.pnum.GENERIC_F723ICTX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F723ICTX.build.board=GENERIC_F723ICTX
+GenF7.menu.pnum.GENERIC_F723ICTX.build.product_line=STM32F723xx
+GenF7.menu.pnum.GENERIC_F723ICTX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
+# Generic F723IEKx
+GenF7.menu.pnum.GENERIC_F723IEKX=Generic F723IEKx
+GenF7.menu.pnum.GENERIC_F723IEKX.upload.maximum_size=524288
+GenF7.menu.pnum.GENERIC_F723IEKX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F723IEKX.build.board=GENERIC_F723IEKX
+GenF7.menu.pnum.GENERIC_F723IEKX.build.product_line=STM32F723xx
+GenF7.menu.pnum.GENERIC_F723IEKX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
+# Generic F723IETx
+GenF7.menu.pnum.GENERIC_F723IETX=Generic F723IETx
+GenF7.menu.pnum.GENERIC_F723IETX.upload.maximum_size=524288
+GenF7.menu.pnum.GENERIC_F723IETX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F723IETX.build.board=GENERIC_F723IETX
+GenF7.menu.pnum.GENERIC_F723IETX.build.product_line=STM32F723xx
+GenF7.menu.pnum.GENERIC_F723IETX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
+# Generic F730I8Kx
+GenF7.menu.pnum.GENERIC_F730I8KX=Generic F730I8Kx
+GenF7.menu.pnum.GENERIC_F730I8KX.upload.maximum_size=65536
+GenF7.menu.pnum.GENERIC_F730I8KX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F730I8KX.build.board=GENERIC_F730I8KX
+GenF7.menu.pnum.GENERIC_F730I8KX.build.product_line=STM32F730xx
+GenF7.menu.pnum.GENERIC_F730I8KX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
 # Generic F730R8Tx
 GenF7.menu.pnum.GENERIC_F730R8TX=Generic F730R8Tx
 GenF7.menu.pnum.GENERIC_F730R8TX.upload.maximum_size=65536
@@ -4652,6 +4692,22 @@ GenF7.menu.pnum.GENERIC_F732ZETX.build.board=GENERIC_F732ZETX
 GenF7.menu.pnum.GENERIC_F732ZETX.build.product_line=STM32F732xx
 GenF7.menu.pnum.GENERIC_F732ZETX.build.variant=STM32F7xx/F722Z(C-E)T_F732ZET
 
+# Generic F733IEKx
+GenF7.menu.pnum.GENERIC_F733IEKX=Generic F733IEKx
+GenF7.menu.pnum.GENERIC_F733IEKX.upload.maximum_size=524288
+GenF7.menu.pnum.GENERIC_F733IEKX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F733IEKX.build.board=GENERIC_F733IEKX
+GenF7.menu.pnum.GENERIC_F733IEKX.build.product_line=STM32F733xx
+GenF7.menu.pnum.GENERIC_F733IEKX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
+# Generic F733IETx
+GenF7.menu.pnum.GENERIC_F733IETX=Generic F733IETx
+GenF7.menu.pnum.GENERIC_F733IETX.upload.maximum_size=524288
+GenF7.menu.pnum.GENERIC_F733IETX.upload.maximum_data_size=196608
+GenF7.menu.pnum.GENERIC_F733IETX.build.board=GENERIC_F733IETX
+GenF7.menu.pnum.GENERIC_F733IETX.build.product_line=STM32F733xx
+GenF7.menu.pnum.GENERIC_F733IETX.build.variant=STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)
+
 # Generic F745ZETx
 GenF7.menu.pnum.GENERIC_F745ZETX=Generic F745ZETx
 GenF7.menu.pnum.GENERIC_F745ZETX.upload.maximum_size=524288

variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/generic_clock.c

@@ -17,14 +17,65 @@
 #include "pins_arduino.h"
 
 /**
-  * @brief  System Clock Configuration
-  * @param  None
-  * @retval None
-  */
+ * @brief  System Clock Configuration
+ * @param  None
+ * @retval None
+ */
 WEAK void SystemClock_Config(void)
 {
   /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 216;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 9;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Activate the Over-Drive mode
+  */
+  if (HAL_PWREx_EnableOverDrive() != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the peripherals clock
+  */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_CLK48;
+  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
+  PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
 }
 
 #endif /* ARDUINO_GENERIC_* */

variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/ldscript.ld

@@ -0,0 +1,183 @@
+/*
+******************************************************************************
+**
+** @file        : LinkerScript.ld
+**
+** @author      : Auto-generated by STM32CubeIDE
+**
+** @brief       : Linker script for F723I(C-E)(K-T)_F730I8K_F733IE(K-T) Devices from STM32F7 series
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2023 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = LD_MAX_DATA_SIZE
+  FLASH    (rx)    : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM : {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array     :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}