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correct monitor SP
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sy2002 committed Aug 29, 2015
1 parent 17aef9a commit d5aeaf8
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Showing 3 changed files with 3 additions and 7 deletions.
4 changes: 0 additions & 4 deletions monitor/qmon.asm
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Expand Up @@ -43,11 +43,7 @@
; Main program
;
QMON$COLDSTART MOVE QMON$WELCOME, R8 ; Print welcome message
#ifdef FPGA
MOVE 0x8400, SP ; Set up stack pointer
#else
MOVE IO$BASE, SP
#endif
RSUB IO$PUTS, 1

#ifndef FPGA
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2 changes: 1 addition & 1 deletion vhdl/env1.vhd
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Expand Up @@ -30,7 +30,7 @@ port (
UART_RTS : in std_logic; -- (active low) equals cts from dte, i.e. fpga is allowed to send to dte
UART_CTS : out std_logic; -- (active low) clear to send (dte is allowed to send to fpga)

cts_led : out std_logic
cts_led : out std_logic
);
end env1;

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4 changes: 2 additions & 2 deletions vhdl/env1_globals.vhd
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Expand Up @@ -10,8 +10,8 @@ use IEEE.STD_LOGIC_1164.all;
package env1_globals is

-- file name and file size (in lines) of the file that is converted to the ROM located at 0x0000
constant ROM_FILE : string := "../test_programs/uart.rom";
constant ROM_SIZE : integer := 33;
constant ROM_FILE : string := "../monitor/fpgamon.rom";
constant ROM_SIZE : integer := 2233;

-- size of lower register bank: should be 256
-- set to 16 during development for faster synthesis, routing, etc.
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