23 simulation traces are not understandable for human being

.github/workflows/python-package.yml

@@ -52,6 +52,7 @@ jobs:
         pip install -U git+https://github.com/tancheng/pymtl3.1@yo-struct-list-fix
         pip install hypothesis
         pip install pytest
+        pip install py-markdown-table
         pip list
 
     - name: Test and translate with pytest

cgra/CGRAKingMeshRTL.py

@@ -149,11 +149,20 @@ def construct( s, DataType, PredicateType, CtrlType, width, height,
         s.tile[i].to_mem_waddr.rdy //= 0
         s.tile[i].to_mem_wdata.rdy //= 0
 
+  # verbose trace
+  def verbose_trace( s, verbosity = 1 ):
+    res = ''
+    for (i, x) in enumerate(s.tile):
+      res += "# [tile" + str(i) + "]: " + x.verbose_trace(verbosity = verbosity) + x.ctrl_mem.verbose_trace(verbosity = verbosity) + '\n'
+    res += f"data_mem: {s.data_mem.verbose_trace(verbosity = verbosity)}"
+    res += "------\n\n"
+    return res
+
   # Line trace
   def line_trace( s ):
     # str = "||".join([ x.element.line_trace() for x in s.tile ])
     # str += " :: [" + s.data_mem.line_trace() + "]"
-    res = "||\n".join([ (("[tile"+str(i)+"]: ") + x.line_trace() + x.ctrl_mem.line_trace())
-                              for (i,x) in enumerate(s.tile) ])
+    res = "||\n".join([(("[tile" + str(i) + "]: ") + x.line_trace() + x.ctrl_mem.line_trace())
+                       for (i, x) in enumerate(s.tile)])
     res += "\n :: [" + s.data_mem.line_trace() + "]    \n"
     return res

cgra/CgraCrossbarDataMemRingCtrlMemRTL.py

@@ -182,6 +182,19 @@ def construct(s, DataType, PredicateType, CtrlPktType, CtrlSignalType,
         s.tile[i].to_mem_waddr.rdy //= 0
         s.tile[i].to_mem_wdata.rdy //= 0
 
+
+  def verbose_trace( self, verbosity = 1 ):
+    res = ''
+    for (i, x) in enumerate(self.tile):
+      # todo
+      # CtrlMemDynamicRTL verbose_trace
+      res += "# [tile" + str(i) + "]: " + x.verbose_trace(verbosity = verbosity) + x.ctrl_mem.line_trace() + '\n'
+    # todo
+    # no verbose_trace for DataMemWithCrossbarRTL yet
+    res += f"data_mem: {self.data_mem.line_trace()}"
+    res += "------\n\n"
+    return res
+
   # Line trace
   def line_trace( s ):
     # str = "||".join([ x.element.line_trace() for x in s.tile ])

cgra/translate/VectorCGRAKingMeshRTL_test.py

@@ -67,6 +67,9 @@ def done( s ):
     return done
 
   def line_trace( s ):
+    # verbose trace (test without verilog)
+    # verbosity = 2
+    # return s.dut.verbose_trace(verbosity = verbosity)
     return s.dut.line_trace()
 
 def test_homo_4x4( cmdline_opts ):

fu/flexible/FlexibleFuRTL.py

@@ -8,10 +8,8 @@
   Date : Dec 24, 2019
 
 """
+from py_markdown_table.markdown_table import markdown_table
 
-from pymtl3 import *
-from ...fu.single.MemUnitRTL import MemUnitRTL
-from ...fu.single.AdderRTL  import AdderRTL
 from ...lib.basic.en_rdy.ifcs import SendIfcRTL, RecvIfcRTL
 from ...lib.opt_type import *
 
@@ -111,11 +109,47 @@ def comb_logic():
           s.fu_recv_in_rdy_vector[port][i] @= s.fu[i].recv_in[port].rdy
         s.recv_in[port].rdy @= reduce_or( s.fu_recv_in_rdy_vector[port] )
 
+
+  def verbose_trace_md_formatter( self, data_type, data ):
+      assert data_type in [ "recv", "send" ]
+      data_list = [ x for x in data ]
+      result_list = []
+      for idx, fu_data in enumerate(data_list):
+        msg_dict = fu_data.msg.__dict__
+        if data_type is "recv":
+          fu_port_dict = { "fu_inport_idx": idx, "rdy": fu_data.rdy }
+        else:
+          fu_port_dict = { "fu_outport_idx": idx, "en": fu_data.en }
+        fu_port_dict.update(msg_dict)
+        result_list.append(fu_port_dict)
+      result_md = markdown_table(result_list).set_params(quote = False).get_markdown()
+      return result_md
+
+  # verbose trace if verbosity > 0
+  def verbose_trace( s, verbosity = 1 ):
+    # for clk n
+    # recv:
+    #   1. OPT: opt+rdy(if ready to receive opt)
+    #   2. Data: [rdy(if ready to receive data) and msg(data) for each inport(total 4 for now)]
+    # out: [en(if data is sent out) and msg for each outport(total 2 for now)]
+    opt_ctrl = OPT_SYMBOL_DICT[s.recv_opt.msg.ctrl]
+    opt_rdy = s.recv_opt.rdy
+    recv_md = s.verbose_trace_md_formatter("recv", s.recv_in)
+    send_md = s.verbose_trace_md_formatter("send", s.send_out)
+
+    return (f'## class: {s.__class__.__name__}\n'
+            f'- FU recv:\n'
+            f'  FU opt: {opt_ctrl}, opt_rdy: {opt_rdy}\n'
+            f'  FU data:'
+            f'{recv_md}\n'
+            f'===>\n'
+            f'- FU out:'
+            f'{send_md}')
+
   def line_trace( s ):
     opt_str = " #"
     if s.recv_opt.en:
       opt_str = OPT_SYMBOL_DICT[s.recv_opt.msg.ctrl]
     out_str = ",".join([str(x.msg) for x in s.send_out])
     recv_str = ",".join([str(x.msg) for x in s.recv_in])
     return f'[recv: {recv_str}] {opt_str}(P{s.recv_opt.msg.predicate}) (const: {s.recv_const.msg}, en: {s.recv_const.en}) ] = [out: {out_str}] (recv_opt.rdy: {s.recv_opt.rdy}, recv_in[0].rdy: {s.recv_in[0].rdy}, recv_in[1].rdy: {s.recv_in[1].rdy}, recv_predicate.msg: {s.recv_predicate.msg}, {OPT_SYMBOL_DICT[s.recv_opt.msg.ctrl]}, recv_opt.en: {s.recv_opt.en}, send[0].en: {s.send_out[0].en}) '
-

lib/util/common.py

@@ -21,3 +21,25 @@
 LINK_NO_MEM   = 0
 LINK_FROM_MEM = 1
 LINK_TO_MEM   = 2
+
+TILE_PORT_DIRECTION_DICT = {
+    PORT_NORTH: "NORTH",
+    PORT_SOUTH: "SOUTH",
+    PORT_WEST: "WEST",
+    PORT_EAST: "EAST",
+    PORT_NORTHWEST: "NORTHWEST",
+    PORT_NORTHEAST: "NORTHEAST",
+    PORT_SOUTHEAST: "SOUTHEAST",
+    PORT_SOUTHWEST: "SOUTHWEST"
+}
+
+TILE_PORT_DIRECTION_DICT_SHORT_DESC = {
+    PORT_NORTH: "N",
+    PORT_SOUTH: "S",
+    PORT_WEST: "W",
+    PORT_EAST: "E",
+    PORT_NORTHWEST: "NW",
+    PORT_NORTHEAST: "NE",
+    PORT_SOUTHEAST: "SE",
+    PORT_SOUTHWEST: "SW"
+}

mem/ctrl/CtrlMemRTL.py

@@ -7,12 +7,12 @@
 Author : Cheng Tan
   Date : Dec 21, 2019
 """
-
-
-from pymtl3 import *
+from py_markdown_table.markdown_table import markdown_table
 from pymtl3.stdlib.primitive import RegisterFile
+
 from ...lib.basic.en_rdy.ifcs import SendIfcRTL, RecvIfcRTL
 from ...lib.opt_type import *
+from ...lib.util.common import TILE_PORT_DIRECTION_DICT_SHORT_DESC
 
 
 class CtrlMemRTL( Component ):
@@ -72,7 +72,121 @@ def update_raddr():
           else:
             s.reg_file.raddr[0] <<= s.reg_file.raddr[0] + AddrType( 1 )
 
+  def verbose_trace_normal_processor( self, data_dict ):
+    data_dict['ctrl'] = OPT_SYMBOL_DICT[ data_dict['ctrl'] ]
+    if 'predicate' in data_dict:
+      data_dict['predicate'] = int(data_dict['predicate'])
+    if 'routing_xbar_outport' in data_dict:
+      data_dict['routing_xbar_outport'] = [ int(rxop) for rxop in data_dict['routing_xbar_outport'] ]
+    if 'fu_xbar_outport' in data_dict:
+      data_dict['fu_xbar_outport'] = [ int(fxop) for fxop in data_dict['fu_xbar_outport'] ]
+    if 'routing_predicate_in' in data_dict:
+      data_dict['routing_predicate_in'] = [ int(rpi) for rpi in data_dict['routing_predicate_in'] ]
+
+  def verbose_trace_fu_in_processor( self, data_dict, sub_header ):
+    data_dict['fu_in'] = [ int(fi) for fi in data_dict['fu_in'] ]
+    fu_in_header = []
+    for idx, val in enumerate(data_dict['fu_in']):
+      fu_in_header.append(idx)
+    fu_in_header_str = "|".join([ f"{hd : ^3}" for hd in fu_in_header ])
+    data_dict['fu_in'] = "|".join([ f"{v : ^3}" for v in data_dict['fu_in'] ])
+    sub_header['fu_in'] = fu_in_header_str
+
+  def verbose_trace_outport_processor( self, data_dict, sub_header, num_direction_ports ):
+    if 'outport' in data_dict:
+      data_dict['outport'] = [ int(op) for op in data_dict['outport'] ]
+      fu_reg_num = 1
+      outport_sub_header = []
+      for idx, val in enumerate(data_dict['outport']):
+        # to directions
+        if idx <= num_direction_ports - 1:
+          hd = TILE_PORT_DIRECTION_DICT_SHORT_DESC[idx]
+          outport_sub_header.append(f"{hd : ^{len(hd) + 2}}")
+          data_dict['outport'][idx] = f"{TILE_PORT_DIRECTION_DICT_SHORT_DESC[val - 1] if val != 0 else '-' : ^{len(hd) + 2}}"
+        # to fu regs
+        else:
+          hd = f"fu_reg_{fu_reg_num}"
+          outport_sub_header.append(f"{hd : ^{len(hd)}}")
+          data_dict['outport'][idx] = f"{TILE_PORT_DIRECTION_DICT_SHORT_DESC[val - 1] if val != 0 else '-' : ^{len(hd)}}"
+          fu_reg_num += 1
+      outport_sub_header_str = "|".join([ hd for hd in outport_sub_header ])
+      data_dict['outport'] = "|".join([ v for v in data_dict['outport'] ])
+      sub_header['outport'] = outport_sub_header_str
+
+  def verbose_trace_predicate_in_processor( self, data_dict, sub_header, num_direction_ports ):
+    if 'predicate_in' in data_dict:
+      data_dict['predicate_in'] = [ int(pi) for pi in data_dict['predicate_in'] ]
+      fu_out_num = 1
+      predicate_in_sub_header = []
+      for idx, val in enumerate(data_dict['predicate_in']):
+        # from directions
+        if idx <= num_direction_ports - 1:
+          hd = TILE_PORT_DIRECTION_DICT_SHORT_DESC[idx]
+          predicate_in_sub_header.append(f"{hd : ^{len(hd) + 2}}")
+          data_dict['predicate_in'][idx] = f"{val : ^{len(hd) + 2}}"
+        # from fu
+        else:
+          hd = f"fu_out_{fu_out_num}"
+          predicate_in_sub_header.append(f"{hd : ^{len(hd)}}")
+          data_dict['predicate_in'][idx] = f"{val : ^{len(hd)}}"
+          fu_out_num += 1
+      predicate_in_sub_header_str = "|".join([ hd for hd in predicate_in_sub_header ])
+      data_dict['predicate_in'] = "|".join([ v for v in data_dict['predicate_in'] ])
+      sub_header['predicate_in'] = predicate_in_sub_header_str
+
+  def verbose_trace_data_processor( self, data_dict, num_direction_ports ):
+    sub_header = {}
+    for key in data_dict.keys():
+      sub_header[key] = ''
+    self.verbose_trace_normal_processor(data_dict)
+    self.verbose_trace_fu_in_processor(data_dict, sub_header)
+    self.verbose_trace_outport_processor(data_dict, sub_header, num_direction_ports)
+    self.verbose_trace_predicate_in_processor(data_dict, sub_header, num_direction_ports)
+    return sub_header
+
+  # verbose trace
+  def verbose_trace( s, verbosity = 1 ):
+    num_fu_in = len(s.reg_file.regs[0].fu_in)
+    # num_inports = len(s.reg_file.regs[0].predicate_in)
+    num_outports = len(s.reg_file.regs[0].outport if hasattr(s.reg_file.regs[0], 'outport') else [])
+    num_direction_ports = num_outports - num_fu_in
+
+    # recv_ctrl
+    recv_ctrl_msg_dict = dict(s.recv_ctrl.msg.__dict__)
+    recv_ctrl_sub_header = s.verbose_trace_data_processor(recv_ctrl_msg_dict, num_direction_ports)
+    recv_ctrl_msg_list = [ recv_ctrl_sub_header, recv_ctrl_msg_dict ]
+    recv_ctrl_md = markdown_table(recv_ctrl_msg_list).set_params(quote=False).get_markdown()
+
+    # send_ctrl
+    send_ctrl_msg_dict = dict(s.send_ctrl.msg.__dict__)
+    send_ctrl_sub_header = s.verbose_trace_data_processor(send_ctrl_msg_dict, num_direction_ports)
+    send_ctrl_msg_list = [ send_ctrl_sub_header, send_ctrl_msg_dict ]
+    send_ctrl_md = markdown_table(send_ctrl_msg_list).set_params(quote=False).get_markdown()
+
+    if verbosity == 1:
+      return (f'\n## class: {s.__class__.__name__}\n'
+              f'- recv_ctrl_msg:'
+              f'{recv_ctrl_md}\n\n'
+              f'- send_ctrl_msg:'
+              f'{send_ctrl_md}\n\n')
+    else:
+      # reg
+      reg_dicts = [ dict(data.__dict__) for data in s.reg_file.regs ]
+      reg_sub_header = {}
+      for reg_dict in reg_dicts:
+        reg_sub_header = s.verbose_trace_data_processor(reg_dict, num_direction_ports)
+      reg_dicts.insert(0, reg_sub_header)
+      reg_md = markdown_table(reg_dicts).set_params(quote=False).get_markdown()
+      return (f'\n## class: {s.__class__.__name__}\n'
+              f'- recv_ctrl_msg:'
+              f'{recv_ctrl_md}\n\n'
+              f'- send_ctrl_msg:'
+              f'{send_ctrl_md}\n\n'
+              f'- ctrl_memory: {reg_md}\n')
+
+
   def line_trace( s ):
-    out_str  = "||".join([ str(data) for data in s.reg_file.regs ])
+    out_str = "||".join([str(data) for data in s.reg_file.regs])
     return f'{s.recv_ctrl.msg} : [{out_str}] : {s.send_ctrl.msg}'
 
+

mem/data/DataMemRTL.py

@@ -7,10 +7,9 @@
 Author : Cheng Tan
   Date : Dec 20, 2019
 """
-
-
 from pymtl3 import *
 from pymtl3.stdlib.primitive import RegisterFile
+from py_markdown_table.markdown_table import markdown_table
 from ...lib.basic.en_rdy.ifcs import SendIfcRTL, RecvIfcRTL
 from ...lib.opt_type import *
 
@@ -98,7 +97,50 @@ def update_signal():
         s.recv_waddr[i].rdy @= Bits1( 1 )
         s.recv_wdata[i].rdy @= Bits1( 1 )
 
-  def line_trace(s):
+
+  # verbose trace
+  def verbose_trace( s, verbosity = 1 ):
+    # data memory: mem size, reg
+    # recv_raddr(rdy, msg), send_rdata(en, msg), recv_waddr(rdy, msg), recv_wdata, tile #
+    reg_dicts = [ dict(data.__dict__) for data in s.reg_file.regs ]
+    reg_list = []
+    for idx, data in enumerate(reg_dicts):
+      reg_dict = {"addr": f"addr {idx}"}
+      reg_dict.update(data)
+      reg_list.append(reg_dict)
+    reg_md = markdown_table(reg_list).set_params(quote=False).get_markdown()
+
+    rw_ports_max_count = max(len(s.recv_raddr), len(s.recv_waddr))
+    mem_list = []
+    for idx in range(rw_ports_max_count):
+      recv_raddr_rdy, recv_raddr = None, None
+      send_rdata_en, send_rdata = None, None
+      recv_waddr_rdy, recv_waddr = None, None
+      recv_wdata = None
+      if idx <= len(s.recv_raddr) - 1:
+        recv_raddr_rdy = s.recv_raddr[idx].rdy
+        recv_raddr = s.recv_raddr[idx].msg
+        send_rdata_en = s.send_rdata[idx].en
+        send_rdata = s.send_rdata[idx].msg.payload
+      if idx <= len(s.recv_waddr) - 1:
+        recv_waddr_rdy = s.recv_waddr[idx].rdy
+        recv_waddr = s.recv_waddr[idx].msg
+        recv_wdata = s.recv_wdata[idx].msg.payload
+      mem_dict = {"recv_raddr(rdy, msg)": f"{recv_raddr_rdy}, {recv_raddr}",
+                  "send_rdata(en, msg)": f"{send_rdata_en}, {send_rdata}",
+                  "recv_waddr(rdy, msg)": f"{recv_waddr_rdy}, {recv_waddr}",
+                  "recv_wdata": f"{recv_wdata}",
+                  "Tiles in Col0": "<--- Tile"}
+      mem_list.append(mem_dict)
+    mem_md = markdown_table(mem_list).set_params(quote=False).get_markdown()
+
+    return (f'\nclass: {s.__class__.__name__}\n'
+            f'- regs(mem size: {len(reg_dicts)}): {reg_md}\n'
+            f'- mem_r/w:'
+            f'{mem_md}')
+
+
+  def line_trace( s ):
     recv_raddr_str = "recv_read_addr: " + "|".join([str(data.msg) for data in s.recv_raddr])
     recv_waddr_str = "recv_write_addr: " + "|".join([str(data.msg) for data in s.recv_waddr])
     recv_wdata_str = "recv_write_data: " + "|".join([str(data.msg) for data in s.recv_wdata])
@@ -110,3 +152,4 @@ def line_trace(s):
     # return f'<{s.reg_file.wen[0]}>{s.reg_file.waddr[0]}:{s.reg_file.wdata[0]}|{s.reg_file.raddr[0]}:{s.reg_file.rdata[0]}'
     # rf_trace = f'<{s.reg_file.wen[0]}>{s.reg_file.waddr[0]}:{s.reg_file.wdata[0]}|{s.reg_file.raddr[0]}:{s.reg_file.rdata[0]}'
     # return f'[{s.recv_wdata[0].en & s.recv_waddr[0].en}]{s.recv_waddr[0]}<{s.recv_wdata[0]}({rf_trace}){s.recv_raddr[0]}>{s.send_rdata[0]}'
+

scale_out/RingMultiCgraRingCtrlMemRTL.py

@@ -98,6 +98,13 @@ def construct(s, CGRADataType, PredicateType, CtrlPktType,
             s.cgra[cgra_row * cgra_columns + cgra_col].recv_data_on_boundary_east[tile_row].en //= 0
             s.cgra[cgra_row * cgra_columns + cgra_col].recv_data_on_boundary_east[tile_row].msg //= CGRADataType()
 
+  def verbose_trace( self, verbosity = 1 ):
+    res = ''
+    for (i, x) in enumerate(self.cgra):
+      res += "# [cgra" + str(i) + "]:\n" + x.verbose_trace(verbosity = verbosity) + '\n'
+    res += f"## ring: {self.ring.line_trace()}"
+    return res
+
   def line_trace(s):
     res = "||\n".join([(("[cgra["+str(i)+"]: ") + x.line_trace())
                        for (i,x) in enumerate(s.cgra)])

scale_out/test/RingMultiCgraRingCtrlMemRTL_test.py

@@ -81,6 +81,7 @@ def done(s):
     # return True
 
   def line_trace(s):
+    # return s.dut.verbose_trace(verbosity = 2)
     return s.dut.line_trace()
 
 def test_homo_2x2(cmdline_opts):

systolic/CgraMemRightAndBottomRTL.py

@@ -123,8 +123,17 @@ def construct(s, DataType, PredicateType, CtrlType, width, height,
         s.tile[i].to_mem_waddr.rdy //= 0
         s.tile[i].to_mem_wdata.rdy //= 0
 
+  def verbose_trace( s, verbosity = 1 ):
+    res = ''
+    for (i, x) in enumerate(s.tile):
+      res += "# [tile" + str(i) + "]: " + x.verbose_trace(verbosity = verbosity) + x.ctrl_mem.verbose_trace(verbosity = verbosity) + '\n'
+    res += f"# SouthMem: {s.data_mem_south.verbose_trace(verbosity = verbosity)}"
+    res += f"# EastMem: {s.data_mem_east.verbose_trace(verbosity = verbosity)}"
+    res += "------\n\n"
+    return res
+
   # Line trace
-  def line_trace(s):
+  def line_trace( s ):
     # str = "||".join([ x.element.line_trace() for x in s.tile ])
     # str += " :: [" + s.data_mem.line_trace() + "]"
     res = "||\n".join([(("[tile" + str(i) + "]: ") + x.line_trace() + x.ctrl_mem.line_trace())