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d6d882b
change(ble): [AUTO_MR] Update lib_esp32c2 to 27b6e1dc
Nov 7, 2025
e83efa9
change(ble): [AUTO_MR] updated rom linker script for ESP32-C2
Nov 5, 2025
bef5b13
change(ble): [AUTO_MR] Update lib_esp32h2 to b6027aeb
Nov 7, 2025
5811c72
change(ble): [AUTO_MR] Update lib_esp32c6 to b6027aeb
Nov 7, 2025
a18213c
change(ble): [AUTO_MR] Update lib_esp32c5 to b6027aeb
Nov 7, 2025
3030f47
feat: rename ble sleep related apt on ESP32-C6
zhaoweiliang2021 Nov 7, 2025
975a3f9
feat: rename ble sleep related apt on ESP32-H2
zhaoweiliang2021 Nov 7, 2025
0633afe
feat: rename ble sleep related apt on ESP32-C5
zhaoweiliang2021 Nov 7, 2025
5e63d62
feat(ble): add peripheral fast rx data in latency config on ESP32-C6
zhaoweiliang2021 Nov 7, 2025
3a1a9d8
feat(ble): add peripheral fast rx data in latency config on ESP32-C5
zhaoweiliang2021 Nov 7, 2025
036c867
fix(esp_lcd): Issue where M5Stack CoreS3 uses GPIO 35 for MISO and LC…
jboynes Nov 12, 2025
54513a2
feat(bt): Adds an SPP API parameter to indicate whether to create SPP…
xiongweichao Nov 18, 2025
14a67af
fix(bt/examples): Fixed test_bt_l2cap not finding ESP_SDP_CREATE_RECO…
Finney-esp Nov 17, 2025
ac8b73b
fix(bootloader): fix signature verification skip in deep sleep scenario
mahavirj Nov 19, 2025
e3024aa
fix(openthread): remove the duplicate macro definition
gytxxsy Nov 20, 2025
7d8d166
ci(parlio): fixed incorrect condition in rx test case
L-KAYA Oct 28, 2025
ce84d73
feat(gdma_link): support to select final node link type
L-KAYA Jul 22, 2025
0b0306a
refactor(parlio_rx): use gdma_link for better gdma link management
L-KAYA Jul 21, 2025
34a54e8
docs: fix some description in security guide docs
Sep 22, 2025
57b5376
fix : apply the suggestion from doc team
Sep 22, 2025
79bb3ff
docs: implement comments
0cici Nov 27, 2025
2d47ed3
refactor(tools): test_idf_tools.py ruff changes
mfialaf Nov 19, 2025
69873c0
feat(tools): Updated ccache 4.11.2 -> 4.12.1
mfialaf Nov 19, 2025
047ea94
refactor(parlio_rx): refactor to support unaligned user payload buffer
L-KAYA Jul 24, 2025
10de0f3
fix(i2s): fixed divide-by-zero coverity issue
L-KAYA Nov 3, 2025
80e4bbb
fix(touch): make the gpio init symmetric
L-KAYA Nov 6, 2025
06c5d72
docs(pm): updated i2s pm lock type in DFS
L-KAYA Nov 7, 2025
da6508f
feat(parlio_rx): support to force trigger eof
L-KAYA Nov 5, 2025
523a43f
feat(parlio_rx): support to receive data into external ram
L-KAYA Nov 7, 2025
695507d
fix(parlio_rx): fixed incorrect dma buffer length calculation
L-KAYA Nov 10, 2025
64f528c
test(parlio): fix sleep test issue
Kainarx Nov 10, 2025
b8f60d7
fix(i2s): fix the auto port failure when use simplex on ESP32
L-KAYA Nov 25, 2025
26b91fc
feat(hw_support): add config version for c5 v1.2
ginkgm Nov 20, 2025
625c966
feat(hw_support): add config version for c61 v1.1
ginkgm Nov 20, 2025
b940b46
fix(ble): put ble_log_write_hex in iram to avoid cache error
Dec 1, 2025
63ceae8
feat(ble): enabled lc get time for ceva controller
Dec 1, 2025
46c10bb
fix(bt/bluedroid): Fix the status judgment of the A2DP source registr…
Finney-esp Nov 27, 2025
ddd23f7
fix(bt): fixed crash caused by deinit during A2DP connection initiation
xiongweichao Nov 20, 2025
21cb976
fix(touch): Add missing bit swap to fix channel 8 and 9
Nov 11, 2025
3e4bed2
feat(mbedtls): add ECC P-384 mbedtls support and test_cases
nileshkale123 Nov 28, 2025
6e972ac
feat(esp_hal_usb): Add remote wakeup support
peter-marcisovsky Oct 7, 2025
b23f516
feat(openthread/ota): support esp32h2 for ota examples over thread
tanyanquan Nov 10, 2025
6b490a2
fix(driver_twai): enhance ci test and fix example
wanckl Nov 14, 2025
c5b01fc
fix(usb_host): Dont abort on unsupported client events
peter-marcisovsky Dec 4, 2025
a5601fb
fix(protocomm): add validation for Security1 client verifier data
mahavirj Nov 20, 2025
b0b2130
fix(ble): add soc caps config for pawr feat on ESP32C6
ChrysalisChenJ Dec 11, 2025
a6aa9bf
fix(ble): add soc caps config for pawr feat on ESP32H2
ChrysalisChenJ Dec 11, 2025
0cce37f
fix(ble): add soc caps config for pawr feat on ESP32C5
ChrysalisChenJ Dec 11, 2025
7569042
fix(ble): add soc caps config for pawr feat on ESP32C61
ChrysalisChenJ Dec 11, 2025
b846298
fix(ble): remove target dependency on power control config on ESP32C6
ChrysalisChenJ Dec 11, 2025
df9e35e
fix(ble): remove target dependency on power control config on ESP32C5
ChrysalisChenJ Dec 11, 2025
ac19656
test(tsens): Re-enable temperature sensor test on esp32p4 v3
mythbuster5 Dec 12, 2025
d569b7d
change(bt/bluedroid): Change AVRCP version according to feature enabled
esp-lrh Dec 9, 2025
99b9913
feat(openthread): support RCP console debug via spinel
tanyanquan Nov 20, 2025
c9c2568
feat(isp): support Crop driver on p4 rev3
Vorrad Sep 8, 2025
2ce6e22
fix(intr_alloc): Fix ISR allocate methods in several drivers
Vorrad Nov 6, 2025
b3d80b2
fix(ledc): fix potential null dereference issue & add test case
Vorrad Nov 19, 2025
b70e8ae
fix(bt/bluedroid): fixed possible access to NULL in l2c_fcr_clone_buf
BetterJincheng Dec 15, 2025
80c1fc8
fix(jpeg): Fix check in com marker
mythbuster5 Dec 15, 2025
38a0beb
feat(jpeg_decoder): Add decode to yuv420 since esp32p4 version3
mythbuster5 Dec 15, 2025
1a3e2da
fix(jpeg): Fix jpeg color space check
mythbuster5 Dec 17, 2025
5d8104a
feat(802.15.4): Update the 'ieee802154_get_recent_rssi' API to obtain…
Nov 28, 2025
7e93257
fix(ble): added missed spin lock initialization
Dec 18, 2025
943b853
Revert "fix: add check to ensure OTA buffer size for 16-byte aligned"
nileshkale123 Nov 3, 2025
88fe9e4
fix(esp_https_ota): align OTA resumption offset to 16-byte boundary
nileshkale123 Oct 21, 2025
ab8f498
feat: added testcase to check ota resumption if FE is enabled
nileshkale123 Nov 5, 2025
ca3ff9a
docs(ppa): add a note about bilinear scaling algorithm in PPA SRM
songruo Oct 17, 2025
507bea7
fix(ppa): YUV444 cannot be a PPA SRM output color mode
songruo Oct 20, 2025
1b13ef0
fix(ppa): fix potential SRM operation stuck on DMA issue
songruo Oct 20, 2025
d6fbe41
fix(ppa): fix SRM YUV422/420 incorrect DMA descriptor port mode block…
songruo Dec 17, 2025
4f1cf6a
chor(twai): improve error logging in _node_queue_tx function
diplfranzhoepfinger Nov 16, 2025
973c1b4
fix(driver_twai): improve new driver API description
wanckl Dec 2, 2025
9be9515
test(freertos): Fix race condition in suspend-resume tests
sudeep-mohanty Dec 18, 2025
131200a
test(freertos): Added stability fixes to the delete blocked tasks test
sudeep-mohanty Dec 18, 2025
b652c1a
refactor(gdma): skip the null buffer in mount pre-check
suda-morris Nov 18, 2025
798ec36
fix(drivers): enlarge the default DMA burst size in peripheral drivers
suda-morris Dec 19, 2025
707147f
fix(i2c_master): Add i2c master timeout range check
Vorrad Dec 1, 2025
d4defb6
feat(openthread): update OT upstream to a12ff0d0f
tanyanquan Dec 4, 2025
5d7ca54
feat(openthread): add message pool deinitialization
gytxxsy Dec 23, 2025
6435473
feat(openthread/lib): update thread-lib for upstream a12ff0d0f
tanyanquan Dec 24, 2025
05ff6f2
feat(ble): added xor checksum for integrity check performance optimiz…
Dec 24, 2025
4c21f79
fix(ble): added missed ts sync reset
Dec 24, 2025
a961d7d
fix(ble): added null pointer check in ble log ts submodule
Dec 24, 2025
46ae86b
fix(cache): fixed cache sync ops concurrent call issue
Icarus113 Dec 19, 2025
a873c3c
Merge branch 'fix/jpeg_com_marker_check_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
921f13f
Merge branch 'test/reenable_tsens_test_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
2a481f5
Merge branch 'feat/isp_crop_driver_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
b36dfcf
Merge branch 'fix/touch_bit_swap_esp32_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
e5b4993
Merge branch 'backport/recent_backport_collection_v5.5' into 'release…
suda-morris Dec 26, 2025
259652d
Merge branch 'feat/usb_host_example_unknown_client_event_backport_v5.…
suda-morris Dec 26, 2025
e562121
Merge branch 'feat/usb_host_hal_remote_wake_backport_5.5' into 'relea…
suda-morris Dec 26, 2025
36972d5
Merge branch 'bugfix/ppa_srm_stuck_on_dma_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
24597d4
Merge branch 'fix/freertos_delete_block_tasks_test_v5.5' into 'releas…
ESP-Marius Dec 26, 2025
c6781e2
Merge branch 'fix/freertos_suspen_resume_test_memory_leak_v5.5' into …
ESP-Marius Dec 26, 2025
7af8d24
Merge branch 'fix/twai_ci_test_enhance_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
fa71573
Merge branch 'contrib/github_pr_17858_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
0e194e6
Merge branch 'bugfix/a2dp_reg_sep_v5.5' into 'release/v5.5'
wmy-espressif Dec 26, 2025
ac9a427
Merge branch 'bugfix/bt_idf_ci_v5.5' into 'release/v5.5'
wmy-espressif Dec 26, 2025
1e9f631
Merge branch 'bugfix/l2c_fcr_clone_buf_v5.5' into 'release/v5.5'
wmy-espressif Dec 26, 2025
8c47552
Merge branch 'change/bt_bluedroid_avrcp_version_v5.5' into 'release/v…
wmy-espressif Dec 26, 2025
e0c12ad
Merge branch 'bugfix/a2dp_deinit_crash_v5.5' into 'release/v5.5'
wmy-espressif Dec 26, 2025
ec191d2
Merge branch 'feat/add_param_indicate_create_spp_records_v5.5' into '…
wmy-espressif Dec 26, 2025
4b6eab5
Merge branch 'feat/ble_log_xor_checksum_v5.5' into 'release/v5.5'
Isl2017 Dec 26, 2025
857b519
Merge branch 'fix/ble_log_v2_cache_error_v5.5' into 'release/v5.5'
Isl2017 Dec 26, 2025
4b434bd
Merge branch 'fix/ble_log_v2_dual_core_iwt_v5.5' into 'release/v5.5'
Isl2017 Dec 26, 2025
9615bfa
Merge branch 'fix/fix_cache_sync_ops_multi_call_issue_v5.5' into 'rel…
suda-morris Dec 26, 2025
9ea85ed
Merge branch 'feat/add_c5_v102_config_v5.5' into 'release/v5.5'
mahavirj Dec 26, 2025
4cd5e63
Merge branch 'bugfix/protocomm_sec1_validation_v5.5' into 'release/v5.5'
mahavirj Dec 26, 2025
0f47475
Merge branch 'fix/fix_bootloader_skip_validate_in_deep_sleep_v5.5' in…
mahavirj Dec 26, 2025
b749ca2
Merge branch 'docs/fix_some_expressions_in_security_guide_v5.5' into …
mahavirj Dec 26, 2025
961abe6
Merge branch 'fix/align_ota_written_size_during_ota_resumption_to_las…
mahavirj Dec 26, 2025
3378c69
Merge branch 'feat/add_mbedtls_testcases_for_ecc_p_384_v5.5' into 're…
mahavirj Dec 26, 2025
b214c68
Merge branch 'feat/update_ccache_to_4.12.1_v5.5' into 'release/v5.5'
dobairoland Dec 26, 2025
da5ff0c
Merge branch 'fix/add_soc_caps_for_pawr_feat_v5.5' into 'release/v5.5'
Isl2017 Dec 26, 2025
2cbffea
Merge branch 'change/ble_update_lib_20251106_v5.5' into 'release/v5.5'
Isl2017 Dec 26, 2025
405f144
Merge branch 'fix/remove_the_duplicate_macro_definition_v5.5' into 'r…
zwx1995esp Dec 26, 2025
61ca635
Merge branch 'feat/simple_ota_h2_v5.5' into 'release/v5.5'
zwx1995esp Dec 26, 2025
021f8da
Merge branch 'feat/update_ot_a12ff0d0f_v5.5' into 'release/v5.5'
zwx1995esp Dec 26, 2025
cbed615
Merge branch 'feat/update_154_get_recent_rssi_v5.5' into 'release/v5.5'
zwx1995esp Dec 26, 2025
fb7466c
Merge branch 'refactor/gdma_link_skip_null_buffer_v5.5' into 'release…
suda-morris Dec 26, 2025
d4b93a4
Merge branch 'fix/i2c_timeout_range_check_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
4bccb20
Merge branch 'fix/twai_queue_remain_and_doc_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
2fad74c
Merge branch 'fix/handle_shared_intr_v5.5' into 'release/v5.5'
suda-morris Dec 26, 2025
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4 changes: 0 additions & 4 deletions components/app_update/include/esp_ota_ops.h
Original file line number Diff line number Diff line change
Expand Up @@ -113,10 +113,6 @@ esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp
* Unlike esp_ota_begin(), this function does not erase the partition which receives the OTA update, but rather expects that part of the image
* has already been written correctly, and it resumes writing from the given offset.
*
* @note When flash encryption is enabled, data writes must be 16-byte aligned.
* Any leftover (non-aligned) data is temporarily cached and may be lost after reboot.
* Therefore, during resumption, ensure that image offset is always 16-byte aligned.
*
* @param partition Pointer to info for the partition which is receiving the OTA update. Required.
* @param erase_size Specifies how much flash memory to erase before resuming OTA, depending on whether a sequential write or a bulk erase is being used.
* @param image_offset Offset from where to resume the OTA process. Should be set to the number of bytes already written.
Expand Down
21 changes: 19 additions & 2 deletions components/bootloader_support/src/esp_image_format.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@
#include "hal/cache_ll.h"
#include "spi_flash_mmap.h"
#include "hal/efuse_hal.h"
#include "sdkconfig.h"

#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))

Expand Down Expand Up @@ -141,6 +142,22 @@ static bool is_bootloader(uint32_t offset)
);
}

#if BOOTLOADER_BUILD && (SECURE_BOOT_CHECK_SIGNATURE == 1)
#if CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP
static bool skip_verify(esp_image_load_mode_t mode, bool verify_sha)
{
// Multi level check to ensure that its a legit exit from deep sleep case
return (esp_rom_get_reset_reason(0) == RESET_REASON_CORE_DEEP_SLEEP &&
mode == ESP_IMAGE_LOAD_NO_VALIDATE &&
!verify_sha) ? true : false;
}
#else

#define skip_verify(mode, verify_sha) (false)

#endif
#endif // BOOTLOADER_BUILD && (SECURE_BOOT_CHECK_SIGNATURE == 1)

static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_t *part, esp_image_metadata_t *data)
{
#ifdef BOOTLOADER_BUILD
Expand Down Expand Up @@ -236,9 +253,9 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
"only verify signature in bootloader" into the macro so it's tested multiple times.
*/
#if CONFIG_SECURE_BOOT_V2_ENABLED
ESP_FAULT_ASSERT(!esp_secure_boot_enabled() || memcmp(image_digest, verified_digest, ESP_SECURE_BOOT_DIGEST_LEN) == 0);
ESP_FAULT_ASSERT(!esp_secure_boot_enabled() || skip_verify(mode, verify_sha) || memcmp(image_digest, verified_digest, ESP_SECURE_BOOT_DIGEST_LEN) == 0);
#else // Secure Boot V1 on ESP32, only verify signatures for apps not bootloaders
ESP_FAULT_ASSERT(is_bootloader(data->start_addr) || memcmp(image_digest, verified_digest, HASH_LEN) == 0);
ESP_FAULT_ASSERT(is_bootloader(data->start_addr) || skip_verify(mode, verify_sha) || memcmp(image_digest, verified_digest, HASH_LEN) == 0);
#endif

#endif // SECURE_BOOT_CHECK_SIGNATURE
Expand Down
6 changes: 6 additions & 0 deletions components/bt/common/ble_log/Kconfig.in
Original file line number Diff line number Diff line change
Expand Up @@ -91,6 +91,12 @@ if BLE_LOG_ENABLED
checksum of frame head and payload all together by default, or only
calculate the checksum of frame head to minimize performance decrease

config BLE_LOG_XOR_CHECKSUM_ENABLED
bool "Enable XOR checksum for BLE Log payload integrity check"
default y
help
XOR checksum is introduced for integrity check performance optimization.

config BLE_LOG_ENH_STAT_ENABLED
bool "Enable enhanced statistics for BLE Log"
default n
Expand Down
2 changes: 2 additions & 0 deletions components/bt/common/ble_log/src/ble_log_lbm.c
Original file line number Diff line number Diff line change
Expand Up @@ -198,6 +198,7 @@ bool ble_log_lbm_init(void)
/* Initialize lock types for spin pool */
for (int i = 0; i < BLE_LOG_LBM_SPIN_MAX; i++) {
lbm_ctx->spin_pool[i].lock_type = BLE_LOG_LBM_LOCK_SPIN;
portMUX_INITIALIZE(&(lbm_ctx->spin_pool[i].spin_lock));
}

#if CONFIG_BLE_LOG_LL_ENABLED
Expand Down Expand Up @@ -421,6 +422,7 @@ void ble_log_flush(void)
BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
}

BLE_LOG_IRAM_ATTR
bool ble_log_write_hex(ble_log_src_t src_code, const uint8_t *addr, size_t len)
{
BLE_LOG_REF_COUNT_ACQUIRE(&lbm_ref_count);
Expand Down
5 changes: 4 additions & 1 deletion components/bt/common/ble_log/src/ble_log_rt.c
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,9 @@ BLE_LOG_IRAM_ATTR BLE_LOG_STATIC void ble_log_rt_task(void *pvParameters)
if (rt_ts_enabled) {
ble_log_ts_info_t *ts_info = NULL;
ble_log_ts_info_update(&ts_info);
ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)ts_info, sizeof(ble_log_ts_info_t));
if (ts_info) {
ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)ts_info, sizeof(ble_log_ts_info_t));
}
}
#endif /* CONFIG_BLE_LOG_TS_ENABLED */

Expand Down Expand Up @@ -139,6 +141,7 @@ bool ble_log_sync_enable(bool enable)
return false;
}
rt_ts_enabled = enable;
ble_log_ts_reset(enable);
return true;
}
#endif /* CONFIG_BLE_LOG_TS_ENABLED */
17 changes: 17 additions & 0 deletions components/bt/common/ble_log/src/ble_log_ts.c
Original file line number Diff line number Diff line change
Expand Up @@ -63,6 +63,10 @@ void ble_log_ts_deinit(void)

void ble_log_ts_info_update(ble_log_ts_info_t **info)
{
if (!ts_inited) {
return;
}

BLE_LOG_ENTER_CRITICAL();
ts_info->io_level = !ts_info->io_level;
gpio_set_level(CONFIG_BLE_LOG_SYNC_IO_NUM, ts_info->io_level);
Expand All @@ -73,3 +77,16 @@ void ble_log_ts_info_update(ble_log_ts_info_t **info)

*info = ts_info;
}

void ble_log_ts_reset(bool status)
{
if (!ts_inited) {
return;
}

if (!status && !ts_info->io_level) {
gpio_set_level(CONFIG_BLE_LOG_SYNC_IO_NUM, 1);
}
ts_info->io_level = 0;
gpio_set_level(CONFIG_BLE_LOG_SYNC_IO_NUM, 0);
}
56 changes: 55 additions & 1 deletion components/bt/common/ble_log/src/ble_log_util.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,60 @@ portMUX_TYPE ble_log_spin_lock = portMUX_INITIALIZER_UNLOCKED;
#endif /* !UNIT_TEST */

/* INTERNAL INTERFACE */
BLE_LOG_IRAM_ATTR uint32_t ble_log_fast_checksum(const uint8_t *data, size_t len)
#if CONFIG_BLE_LOG_XOR_CHECKSUM_ENABLED
#include "esp_compiler.h"

static inline uint32_t ror32(uint32_t word, uint32_t shift)
{
if (unlikely(shift == 0)) {
return word;
}
return (word >> shift) | (word << ((32 - shift) & 0x1F));
}

__attribute__((optimize("-O3")))
BLE_LOG_IRAM_ATTR
uint32_t ble_log_fast_checksum(const uint8_t *data, size_t len)
{
/* Validate input length */
if (unlikely(len == 0)) {
return 0;
}

/* Step 1: Force 32-bit align read and calculate offset */
const uint32_t start_offset_shift = ((uintptr_t)data & 0x3) << 3;
const uint32_t *p_aligned = (const uint32_t *)((uintptr_t)data & ~0x3);
const uint32_t *p_end_aligned = (const uint32_t *)((uintptr_t)(data + len) & ~0x3);

/* Step 2: Handle first word with mask (Little endian) */
uint32_t checksum = (*p_aligned) & (0xFFFFFFFFU << start_offset_shift);

/* Step 3: Check if first word is last word */
const uint32_t end_offset_shift = ((uintptr_t)(data + len) & 0x3) << 3;
const uint32_t end_offset_shift_mask = ~(0xFFFFFFFFU << end_offset_shift);
if (unlikely(p_aligned == p_end_aligned)) {
if (end_offset_shift) {
checksum &= end_offset_shift_mask;
}
} else {
/* Step 4: Handle word in the middle */
p_aligned++;
while (p_aligned < p_end_aligned) {
checksum ^= *p_aligned++;
}

/* Step 5: Handle last word with mask (Little endian) */
if (end_offset_shift) {
checksum ^= (*p_aligned) & end_offset_shift_mask;
}
}

/* Step 6: Rotate the final result */
return ror32(checksum, start_offset_shift);
}
#else /* !CONFIG_BLE_LOG_XOR_CHECKSUM_ENABLED */
BLE_LOG_IRAM_ATTR
uint32_t ble_log_fast_checksum(const uint8_t *data, size_t len)
{
uint32_t sum = 0;
size_t i = 0;
Expand Down Expand Up @@ -46,3 +99,4 @@ BLE_LOG_IRAM_ATTR uint32_t ble_log_fast_checksum(const uint8_t *data, size_t len

return sum;
}
#endif /* CONFIG_BLE_LOG_XOR_CHECKSUM_ENABLED */
Original file line number Diff line number Diff line change
Expand Up @@ -29,10 +29,10 @@ extern uint32_t r_ble_lll_timer_current_tick_get(void);
#elif defined(CONFIG_IDF_TARGET_ESP32C2)
extern uint32_t r_os_cputime_get32(void);
#define BLE_LOG_GET_LC_TS r_os_cputime_get32()
/* Legacy BLE Controller (Wait for support) */
// #elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3)
// extern uint32_t lld_read_clock_us(void);
// #define BLE_LOG_GET_LC_TS lld_read_clock_us()
/* Legacy BLE Controller */
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3)
extern uint32_t lld_read_clock_us(void);
#define BLE_LOG_GET_LC_TS lld_read_clock_us()
#else /* Other targets */
#define BLE_LOG_GET_LC_TS 0
#endif /* BLE targets */
Expand All @@ -53,5 +53,6 @@ typedef struct {
bool ble_log_ts_init(void);
void ble_log_ts_deinit(void);
void ble_log_ts_info_update(ble_log_ts_info_t **ts_info);
void ble_log_ts_reset(bool status);

#endif /* __BLE_LOG_TS_H__ */
Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,7 @@ bool ble_log_cas_acquire(volatile bool *cas_lock);
void ble_log_cas_release(volatile bool *cas_lock);
#endif /* UNIT_TEST */

#define BLE_LOG_VERSION (2)
#define BLE_LOG_VERSION (3)

/* TYPEDEF */
typedef enum {
Expand Down
12 changes: 10 additions & 2 deletions components/bt/controller/esp32c5/Kconfig.in
Original file line number Diff line number Diff line change
Expand Up @@ -191,14 +191,14 @@ config BT_LE_MAX_PERIODIC_ADVERTISER_LIST

config BT_LE_POWER_CONTROL_ENABLED
bool "Enable controller support for BLE Power Control"
depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED && IDF_TARGET_ESP32C6
depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED
default n
help
Set this option to enable the Power Control feature on controller

config BT_LE_PERIODIC_ADV_WITH_RESPONSE_ENABLED
bool "Enable BLE periodic advertising with response"
depends on BT_LE_50_FEATURE_SUPPORT
depends on BT_LE_50_FEATURE_SUPPORT && SOC_BLE_PERIODIC_ADV_WITH_RESPONSE
default n
help
This enables BLE periodic advertising with response feature
Expand Down Expand Up @@ -943,3 +943,11 @@ menu "Scheduling Priority Level Config"
default 2 if BT_LE_SYNC_SCHED_PRIO_HIGH_LEVEL
default 1
endmenu

config BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN
bool "Enable Peripheral fast PDU reception during latency"
default n
help
When this option is enabled, the Controller continues receiving PDUs
In the next connection event instead of entering latency
After a data packet is received.
6 changes: 3 additions & 3 deletions components/bt/controller/esp32c5/bt.c
Original file line number Diff line number Diff line change
Expand Up @@ -155,7 +155,7 @@ extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_lll_sleep_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
Expand Down Expand Up @@ -788,10 +788,10 @@ esp_err_t controller_sleep_init(void)
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
r_ble_lll_sleep_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
BLE_RTC_DELAY_US_LIGHT_SLEEP);
#else
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
r_ble_lll_sleep_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
BLE_RTC_DELAY_US_MODEM_SLEEP);
#endif /* FREERTOS_USE_TICKLESS_IDLE */
#endif // CONFIG_BT_LE_SLEEP_ENABLE
Expand Down
6 changes: 6 additions & 0 deletions components/bt/controller/esp32c5/esp_bt_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -209,6 +209,12 @@ extern "C" {
#define DEFAULT_BT_LE_CTRL_FAST_CONN_DATA_TX_EN (0)
#endif

#if defined(CONFIG_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN)
#define DEFAULT_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN (CONFIG_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN)
#else
#define DEFAULT_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN (0)
#endif

#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#else
Expand Down
12 changes: 10 additions & 2 deletions components/bt/controller/esp32c6/Kconfig.in
Original file line number Diff line number Diff line change
Expand Up @@ -222,7 +222,7 @@ config BT_LE_MAX_PERIODIC_ADVERTISER_LIST

config BT_LE_POWER_CONTROL_ENABLED
bool "Enable controller support for BLE Power Control"
depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED && IDF_TARGET_ESP32C6
depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED
default n
help
Set this option to enable the Power Control feature on controller
Expand All @@ -239,7 +239,7 @@ config BT_LE_CTE_FEATURE_ENABLED

config BT_LE_PERIODIC_ADV_WITH_RESPONSE_ENABLED
bool "Enable BLE periodic advertising with response"
depends on BT_LE_50_FEATURE_SUPPORT
depends on BT_LE_50_FEATURE_SUPPORT && SOC_BLE_PERIODIC_ADV_WITH_RESPONSE
default n
help
This enables BLE periodic advertising with response feature
Expand Down Expand Up @@ -977,3 +977,11 @@ menu "Scheduling Priority Level Config"
default 2 if BT_LE_SYNC_SCHED_PRIO_HIGH_LEVEL
default 1
endmenu

config BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN
bool "Enable Peripheral fast PDU reception during latency"
default n
help
When this option is enabled, the Controller continues receiving PDUs
In the next connection event instead of entering latency
After a data packet is received.
6 changes: 3 additions & 3 deletions components/bt/controller/esp32c6/bt.c
Original file line number Diff line number Diff line change
Expand Up @@ -167,7 +167,7 @@ extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_lll_sleep_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
Expand Down Expand Up @@ -848,10 +848,10 @@ esp_err_t controller_sleep_init(void)
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
r_ble_lll_sleep_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
BLE_RTC_DELAY_US_LIGHT_SLEEP);
#else
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
r_ble_lll_sleep_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
BLE_RTC_DELAY_US_MODEM_SLEEP);
#endif /* FREERTOS_USE_TICKLESS_IDLE */
#endif // CONFIG_BT_LE_SLEEP_ENABLE
Expand Down
6 changes: 6 additions & 0 deletions components/bt/controller/esp32c6/esp_bt_cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -212,6 +212,12 @@ extern "C" {
#define DEFAULT_BT_LE_CTRL_FAST_CONN_DATA_TX_EN (0)
#endif

#if defined(CONFIG_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN)
#define DEFAULT_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN (CONFIG_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN)
#else
#define DEFAULT_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN (0)
#endif

#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#else
Expand Down
10 changes: 9 additions & 1 deletion components/bt/controller/esp32h2/Kconfig.in
Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,7 @@ config BT_LE_CTE_FEATURE_ENABLED

config BT_LE_PERIODIC_ADV_WITH_RESPONSE_ENABLED
bool "Enable BLE periodic advertising with response"
depends on BT_LE_50_FEATURE_SUPPORT
depends on BT_LE_50_FEATURE_SUPPORT && SOC_BLE_PERIODIC_ADV_WITH_RESPONSE
default n
help
This enables BLE periodic advertising with response feature
Expand Down Expand Up @@ -981,3 +981,11 @@ menu "Scheduling Priority Level Config"
default 2 if BT_LE_SYNC_SCHED_PRIO_HIGH_LEVEL
default 1
endmenu

config BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN
bool "Enable Peripheral fast PDU reception during latency"
default n
help
When this option is enabled, the Controller continues receiving PDUs
In the next connection event instead of entering latency
After a data packet is received.
6 changes: 3 additions & 3 deletions components/bt/controller/esp32h2/bt.c
Original file line number Diff line number Diff line change
Expand Up @@ -159,7 +159,7 @@ extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_lll_sleep_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
Expand Down Expand Up @@ -816,10 +816,10 @@ esp_err_t controller_sleep_init(void)
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
r_ble_lll_sleep_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
BLE_RTC_DELAY_US_LIGHT_SLEEP);
#else
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
r_ble_lll_sleep_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
BLE_RTC_DELAY_US_MODEM_SLEEP);
#endif /* FREERTOS_USE_TICKLESS_IDLE */
#endif // CONFIG_BT_LE_SLEEP_ENABLE
Expand Down
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