Peat, a Python-based Intel-Optimized Tensorflow dockerization with CPU & Memory constraints configurator
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Updated
Aug 5, 2020 - Python
Peat, a Python-based Intel-Optimized Tensorflow dockerization with CPU & Memory constraints configurator
Aureal A3D Software Development Kit
Verilog implementation of an ordinary differential equation (ODE) solver accelerator chip ― **INCOMPLETE IMPLEMENTATION**
Hardware Accelerator design for Euler and Modified method in solving ODE using VHDL language in Xilinx Vivado Environment
This directory contains the source code for implementing Random Linear Network Coding (RLNC) into Multi-Processor System-on-Chips (MPSoC). By exploiting data vectorization, we obtained latency and throughputs gains during the matrix multiplication operations.
Machine Vision Cam Landing Page
Convolutional Neural Networks for Verilog High-Level Synthesis
Aureal A3D Software Development Kit
ZCU102 firmware. Package for enabling hardware acceleration capabilities in ROS 2 with ZCU102.
ZPrize 2022 - All qualified entries (Docker-backed fork)
Sudoku solver which uses hardware instruction set to speed up significantly the process
Digital Circuits Design Project (PoliMi, year 2022) - Memory Interaction
Deep learning library that exports itself to HDL code for FPGA-based hardware acceleration
GLES offscreen rendering
Hardware acceleration of image scaling
Algorithmic Design of Digital Systems - Autumn Semester 2023 - Indian Institute of Technology Bombay
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