doc/boards.yml, src/board.py: added tangconsole entry

trabucayre · Feb 15, 2025 · c4d4e8d · c4d4e8d
1 parent 79054f3
commit c4d4e8d
Show file tree

Hide file tree

Showing 2 changed files with 8 additions and 0 deletions.
diff --git a/doc/boards.yml b/doc/boards.yml
@@ -723,6 +723,13 @@
   Memory: OK
   Flash: OK
 
+- ID: tangconsole
+  Description: Sipeed Tang Console (dock board for Tang Mega 60k or 138k SOM)
+  URL: https://wiki.sipeed.com/hardware/en/tang/tang-console/mega-console.html
+  FPGA: Gowin Arora V GW5AT-60 / GW5AT-138
+  Memory: OK
+  Flash: OK
+
 - ID: tangnano
   Description: Sipeed Tang Nano
   URL: https://tangnano.sipeed.com/en/

diff --git a/src/board.hpp b/src/board.hpp
@@ -209,6 +209,7 @@ static std::map <std::string, target_board_t> board_list = {
 	JTAG_BOARD("spec45",          "xc6slx45tfgg484",  "", 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("spec150",         "xc6slx150tfgg484", "", 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("stlv7325",        "xc7k325tffg676", "ft4232", 0, 0, CABLE_MHZ(3)),
+	JTAG_BOARD("tangconsole",     "", "ft2232",     0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("tangnano",        "", "ch552_jtag", 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("tangnano1k",      "", "ft2232",     0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("tangnano4k",      "", "ft2232",     0, 0, CABLE_DEFAULT),