Releases: tsisw/linux-socfpga
v0.1.1.tsv021
Move to SKYLP G0070
v0.1.1.tsv015
dtsi changes for cma/udma usage from reserved memory (#9) Co-authored-by: Dushmanta Mohaptra <[email protected]>
v0.1.1.tsv014: dtsi changes for cma/udma usage from reserved memory (#9)
Co-authored-by: Dushmanta Mohaptra <[email protected]>
Release with reuseable reserved memory
This Release has changes to make the reserved memory reusable in sync with v0.1.1.tsv013.
Release of 512MB Reserved space from 0x56A0_0000
This release has two changes
- 512 MB of reserved space starting from 0x56A0_0000
- PCI-E NVME enabled with DDR as combo FPGA works
SSD PCI-E Discovery disabled pending combined images
This Tag allows DDR/Runtime work to proceed without requiring manual DTS file changes. Once combined FPGA image is released we will turn on the SSD + PCI-E config in DTS file
Sanitized SSD changes
These are sanitized SSD changes which work with u-boot command line as follows
; bridge enable 7; md 0xffd11028 1 ; mw 0xffd11028 0x00021ffe ; mw 0xffc03204 0x000c0000;
; mw 0xffc03200 0x00000000; mw 0xffc03304 0x00000013; mw 0xffc03300 0x00000010;
; setenv bootargs " ${bootargs} nvme_core.default_ps_max_latency_us=0 pcie_aspm=off nvme_core.io_timeout=60 nvme.poll_queues=4 pci=nomsi "
; run nandfitload; run nandfitboot;
Working version of SSD 1st commit
This is the first version of SSD fully functional changes for linux with following u-boot commands
; bridge enable 7; md 0xffd11028 1 ; mw 0xffd11028 0x00021ffe ; mw 0xffc03204 0x000c0000;
; mw 0xffc03200 0x00000000; mw 0xffc03304 0x00000013; mw 0xffc03300 0x00000010;
; setenv bootargs " ${bootargs} nvme_core.default_ps_max_latency_us=0 pcie_aspm=off nvme_core.io_timeout=60 nvme.poll_queues=4 pci=nomsi "
; run nandfitload; run nandfitboot;
New Release with TXE Blob working in DDR
FIR - 165 Fix typo in the DTS file (#3) * @FIR-151: Enable /dev/mem to facilitate troubleshooting * @FIR-165: Making changes to Linux to have a TXE reserved memory The changes consist of 1. Reserved memory area from 0x7F00_0000 to 0x7F1F_FFFF for TXE 2. Enabling the flag to turn on HUGETLB * @FIR-165: Fixing the typo in DTS 1. fixed the typo in DTS file 2. disabled the DTS structure --------- Co-authored-by: Ashish Trivedi <[email protected]>
HPS PCI-E Bridge Enable for SSD
This tag is where lspci shows the pCI-E host discovery