Skip to content
View tylerchang's full-sized avatar
  • Columbia University
  • New York, NY

Highlights

  • Pro

Block or report tylerchang

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. aes-fpga aes-fpga Public

    AES Encryption/Decryption Accelerator on Intel De1-SoC FPGA

    C++

  2. energy-scheduler energy-scheduler Public

    Energy-Aware Linux Process Scheduler with sched_ext/eBPF

    C

  3. FPGA_Pong FPGA_Pong Public

    Playing pong on an iCE40 HX1K FPGA. RTL design project coded in Verilog involving buttons, 7-segment displays, UART receiver, and VGA.

    Verilog 1

  4. FV_Final FV_Final Public

    Formal Verification of an ALU using SystemVerilog Assertions and Model Equivalence Checking with Cadence JasperGold

    SystemVerilog 1

  5. digital-fridge digital-fridge Public

    iOS app for reducing food waste by helping users keep track of what is in their fridge and when shelf lifes are approaching. Senior computer science project @ Colorado College

    Swift 1