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Add GPU project chipyard changes #2190

Merged
merged 407 commits into from
Feb 21, 2025
Merged

Add GPU project chipyard changes #2190

merged 407 commits into from
Feb 21, 2025

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richardyrh
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@richardyrh richardyrh commented Feb 7, 2025

  • Added Virgo/Radiance configs, memory coalescer configs, as well as a firesim config
  • Added the radiance submodule
  • Bumped rocket-chip, testchipip and gemmini with new commits
  • Minor sbt and Makefile build system additions
  • Added lightweight CI

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

CI Help:
Add the following labels to modify the CI for a set of features.
Generally, a label added only affect subsequent changes to the PR (i.e. new commits, force pushing, closing/reopening).
See ci:* for full list of labels:

  • ci:fpga-deploy - Run FPGA-based E2E testing
  • ci:local-fpga-buildbitstream-deploy - Build local FPGA bitstreams for platforms that are released
  • ci:disable - Disable CI

@richardyrh richardyrh marked this pull request as ready for review February 19, 2025 18:12
@jerryz123
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Cool, except this seems to break the ClusteredRocketConfig 😢

@hansungk
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chipsalliance/rocket-chip#3718 should fix this

@jerryz123
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Can you add a CI test that builds+runs one of these configs? The test can be something very simple... just a hello world-like thing basically.

@hansungk
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Is using VCS an option? forgot our Vortex fails to build in Verilator

@jerryz123
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Oh, in that case don't bother with testing the sim. You can just add a test that the verilog gets generated.

Verilator fails to build sim binary, so just generate verilog.
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@jerryz123 jerryz123 left a comment

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I would ask you to add a docs page, but you can do that in a follow-on PR so we can get this monster in. Feel free to merge ... ignore the CI failures related to firesim

@richardyrh richardyrh merged commit 424249b into ucb-bar:main Feb 21, 2025
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4 participants