feat(scir): expose port directions, update docs (#426)

* feat(scir): expose port directions, update docs

* expose conversion cell ID lookup

libs/scir/src/lib.rs

@@ -639,7 +639,7 @@ pub enum Direction {
     /// Input or output.
     ///
     /// Represents ports whose direction is not known
-    /// at generator elaboration time.
+    /// at generator elaboration time (e.g. the output of a tristate buffer).
     #[default]
     InOut,
 }
@@ -1681,4 +1681,10 @@ impl Port {
     pub fn signal(&self) -> SignalId {
         self.signal
     }
+
+    /// The direction of this port.
+    #[inline]
+    pub fn direction(&self) -> Direction {
+        self.direction
+    }
 }

libs/spice/src/netlist.rs

@@ -57,11 +57,11 @@ pub trait HasSpiceLikeNetlist: Schema {
     }
     /// Writes an include statement.
     ///
-    /// A newline will be added afterwards.
+    /// A newline will be added afterward.
     fn write_include<W: Write>(&self, out: &mut W, include: &Include) -> Result<()>;
     /// Writes a begin subcircuit statement.
     ///
-    /// A newline will be added afterwards.
+    /// A newline will be added afterward.
     fn write_start_subckt<W: Write>(
         &self,
         out: &mut W,
@@ -70,21 +70,21 @@ pub trait HasSpiceLikeNetlist: Schema {
     ) -> Result<()>;
     /// Writes an end subcircuit statement.
     ///
-    /// A newline will be added afterwards.
+    /// A newline will be added afterward.
     fn write_end_subckt<W: Write>(&self, out: &mut W, name: &ArcStr) -> Result<()>;
     /// Writes a SCIR instance.
     ///
-    /// A newline will be added afterwards.
+    /// A newline will be added afterward.
     fn write_instance<W: Write>(
         &self,
         out: &mut W,
         name: &ArcStr,
         connections: Vec<ArcStr>,
         child: &ArcStr,
     ) -> Result<ArcStr>;
-    /// Writes a primitive instantiation,.
+    /// Writes a primitive instantiation.
     ///
-    /// A newline will be added afterwards.
+    /// A newline will be added afterward.
     fn write_primitive_inst<W: Write>(
         &self,
         out: &mut W,

substrate/src/schematic/conv.rs

@@ -54,6 +54,22 @@ pub struct ScirLibConversion {
     top: Option<CellId>,
 }
 
+impl ScirLibConversion {
+    /// Get the SCIR cell ID corresponding to the given [`RawCell`] if a corresponding cell exists.
+    ///
+    /// May return none if the given raw cell corresponds to a primitive or to a flattened cell.
+    pub fn corresponding_cell<S: Schema + ?Sized>(
+        &self,
+        cell: &RawCell<S>,
+    ) -> Option<scir::CellId> {
+        let conv = self.cells.get(&cell.id)?;
+        match conv {
+            SubstrateCellConversion::Cell(c) => c.cell_id,
+            SubstrateCellConversion::Primitive(_) => None,
+        }
+    }
+}
+
 #[derive(Debug, Clone, Default)]
 pub(crate) struct ScirLibConversionBuilder {
     /// Map from Substrate cell IDs to cell conversion metadata.