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1. 1st-CLaaS 1st-CLaaS Public

   Forked from os-fpga/1st-CLaaS

   Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications

   C

2. warp-v warp-v Public

   Forked from stevehoover/warp-v

   WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.

   JavaScript 2

3. riscv-bitmanip riscv-bitmanip Public

   Forked from riscv/riscv-bitmanip

   Working draft of the proposed RISC-V Bitmanipulation extension

   Makefile 1

4. riscv-formal riscv-formal Public

   Forked from SymbioticEDA/riscv-formal

   RISC-V Formal Verification Framework

   Verilog

5. DNN_TL-V DNN_TL-V Public

   Python 8 2