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Fixes to support wolfBoot native make and gcc-arm cross compiler for …
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…Xilinx UltraScale+ MPSoC. ZD 18159

Adjust wolfBoot linker script to not use 0 base
Add documentation about exception level.
Fixes for QSPI bare-metal driver for multi-sector and read return code.
Fixed issue with Xilinx XMSS IMAGE_HEADER_SIZE in documentation. It should be 5000 bytes.
Added support for SHA3 with ARMASM.
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dgarske committed Nov 1, 2024
1 parent 03aae5a commit 248a598
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4 changes: 2 additions & 2 deletions IDE/XilinxSDK/.cproject
Original file line number Diff line number Diff line change
Expand Up @@ -131,7 +131,7 @@
</toolChain>
</folderInfo>
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</sourceEntries>
</configuration>
</storageModule>
Expand Down Expand Up @@ -267,7 +267,7 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="src/qspi_flash.c|IDE/AURIX|IDE/CCS|IDE/MPLAB|IDE/Renesas|.git|IDE/IAR|test-app|tools|lib/wolfPKCS11|lib/wolfTPM|lib/wolfssl/linuxkm|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-aes-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-curve25519.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha3-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-curve25519.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha3-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha512-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-aes-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-curve25519.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-sha256-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-sha3-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-sha512-asm.S|lib/wolfssl/wolfcrypt/src/port/autosar|lib/wolfssl/wrapper|lib/wolfssl/zephyr|src/boot_x86_fsp.c|src/boot_x86_fsp_start.S|src/boot_x86_fsp_payload.c|src/boot_x86_64.c|src/boot_renesas.c|src/boot_renesas_start.S|src/boot_ppc_start.S|src/boot_ppc_mp.S|src/boot_ppc.c|src/x86|lib/wolfTPM/examples|lib/wolfTPM/tests|lib/wolfTPM/IDE|lib/wolfssl/tests|lib/wolfssl/tirtos|lib/wolfssl/swig|lib/wolfssl/mqx|lib/wolfssl/mplabx|lib/wolfssl/IPP|lib/wolfssl/mcapi|lib/wolfssl/testsuite|lib/wolfssl/examples|lib/wolfssl/IDE|lib/wolfssl/wolfcrypt/user-crypto|lib/wolfssl/wolfcrypt/src/aes_asm.S|lib/wolfssl/wolfcrypt/src/aes_gcm_asm.S|lib/wolfssl/wolfcrypt/src/aes_gcm_x86_asm.S|lib/wolfssl/wolfcrypt/src/aes_xts_asm.S|lib/wolfssl/wolfcrypt/src/chacha_asm.S|lib/wolfssl/wolfcrypt/src/fe_x25519_asm.S|lib/wolfssl/wolfcrypt/src/poly1305_asm.S|lib/wolfssl/wolfcrypt/src/sha256_asm.S|lib/wolfssl/wolfcrypt/src/sha3_asm.S|lib/wolfssl/wolfcrypt/src/sha512_asm.S|lib/wolfssl/wolfcrypt/src/sm3_asm.S|lib/wolfssl/wolfcrypt/src/sp_sm2_x86_64_asm.S|lib/wolfssl/wolfcrypt/src/sp_x86_64_asm.S|lib/wolfssl/wolfcrypt/src/wc_kyber_asm.S|src/vector_riscv.S|src/update_flash_hwswap.c|src/update_flash.c|src/boot_riscv.c|src/boot_arm.c|hal/aurix_tc3xx.c|hal/cc26x2.c|hal/hifive1.c|hal/imx_rt.c|hal/kinetis.c|hal/kontron_vx3060_s2.c|hal/kontron_vx3060_s2_loader.c|hal/library.c|hal/lpc.c|hal/mcxa.c|hal/nrf52.c|hal/nxp_p1021.c|hal/nxp_ppc.c|hal/nxp_t1024.c|hal/nxp_t2080.c|hal/psoc6.c|hal/raspi3.c|hal/renesas-ra.c|hal/renesas-rx.c|hal/renesas-rz.c|hal/rx65n.c|hal/rx72n.c|hal/same51.c|hal/samr21.c|hal/sim.c|hal/skeleton.c|hal/stm32c0.c|hal/stm32f4.c|hal/stm32f7.c|hal/stm32g0.c|hal/stm32h5.c|hal/stm32h7.c|hal/stm32l0.c|hal/stm32l4.c|hal/stm32l5.c|hal/stm32_tz.c|hal/stm32u5.c|hal/stm32wb.c|hal/ti_hercules.c|hal/x86_64_efi.c|hal/x86_fsp_qemu.c|hal/x86_fsp_qemu_loader.c|hal/x86_fsp_tgl.c|hal/x86_uart.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry excluding="lib/wolfssl/wolfcrypt/src/port/arm/thumb2-poly1305-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-kyber-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-chacha-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-kyber-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-poly1305-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-kyber-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-chacha-asm.S|src/qspi_flash.c|IDE/AURIX|IDE/CCS|IDE/MPLAB|IDE/Renesas|.git|IDE/IAR|test-app|tools|lib/wolfPKCS11|lib/wolfTPM|lib/wolfssl/linuxkm|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-aes-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-curve25519.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha3-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-curve25519.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha3-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha512-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-aes-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-curve25519.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-sha256-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-sha3-asm.S|lib/wolfssl/wolfcrypt/src/port/arm/thumb2-sha512-asm.S|lib/wolfssl/wolfcrypt/src/port/autosar|lib/wolfssl/wrapper|lib/wolfssl/zephyr|src/boot_x86_fsp.c|src/boot_x86_fsp_start.S|src/boot_x86_fsp_payload.c|src/boot_x86_64.c|src/boot_renesas.c|src/boot_renesas_start.S|src/boot_ppc_start.S|src/boot_ppc_mp.S|src/boot_ppc.c|src/x86|lib/wolfTPM/examples|lib/wolfTPM/tests|lib/wolfTPM/IDE|lib/wolfssl/tests|lib/wolfssl/tirtos|lib/wolfssl/swig|lib/wolfssl/mqx|lib/wolfssl/mplabx|lib/wolfssl/IPP|lib/wolfssl/mcapi|lib/wolfssl/testsuite|lib/wolfssl/examples|lib/wolfssl/IDE|lib/wolfssl/wolfcrypt/user-crypto|lib/wolfssl/wolfcrypt/src/aes_asm.S|lib/wolfssl/wolfcrypt/src/aes_gcm_asm.S|lib/wolfssl/wolfcrypt/src/aes_gcm_x86_asm.S|lib/wolfssl/wolfcrypt/src/aes_xts_asm.S|lib/wolfssl/wolfcrypt/src/chacha_asm.S|lib/wolfssl/wolfcrypt/src/fe_x25519_asm.S|lib/wolfssl/wolfcrypt/src/poly1305_asm.S|lib/wolfssl/wolfcrypt/src/sha256_asm.S|lib/wolfssl/wolfcrypt/src/sha3_asm.S|lib/wolfssl/wolfcrypt/src/sha512_asm.S|lib/wolfssl/wolfcrypt/src/sm3_asm.S|lib/wolfssl/wolfcrypt/src/sp_sm2_x86_64_asm.S|lib/wolfssl/wolfcrypt/src/sp_x86_64_asm.S|lib/wolfssl/wolfcrypt/src/wc_kyber_asm.S|src/vector_riscv.S|src/update_flash_hwswap.c|src/update_flash.c|src/boot_riscv.c|src/boot_arm.c|src/boot_arm32_start.S|src/boot_arm32.c|hal/aurix_tc3xx.c|hal/cc26x2.c|hal/hifive1.c|hal/imx_rt.c|hal/kinetis.c|hal/kontron_vx3060_s2.c|hal/kontron_vx3060_s2_loader.c|hal/library.c|hal/lpc.c|hal/mcxa.c|hal/nrf52.c|hal/nxp_p1021.c|hal/nxp_ppc.c|hal/nxp_t1024.c|hal/nxp_t2080.c|hal/psoc6.c|hal/raspi3.c|hal/renesas-ra.c|hal/renesas-rx.c|hal/renesas-rz.c|hal/rx65n.c|hal/rx72n.c|hal/same51.c|hal/sama5d3.c|hal/samr21.c|hal/sim.c|hal/skeleton.c|hal/stm32c0.c|hal/stm32f4.c|hal/stm32f7.c|hal/stm32g0.c|hal/stm32h5.c|hal/stm32h7.c|hal/stm32l0.c|hal/stm32l4.c|hal/stm32l5.c|hal/stm32_tz.c|hal/stm32u5.c|hal/stm32wb.c|hal/ti_hercules.c|hal/x86_64_efi.c|hal/x86_fsp_qemu.c|hal/x86_fsp_qemu_loader.c|hal/x86_fsp_tgl.c|hal/x86_uart.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>
Expand Down
25 changes: 21 additions & 4 deletions IDE/XilinxSDK/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,14 @@ These template settings are also in this `.cproject` as preprocessor macros. The
#define WOLFBOOT_LOAD_DTS_ADDRESS 0x11800000
```

The default .cproject build symbols is setup for RSA using:

```
WOLFBOOT_SIGN_RSA4096
WOLFBOOT_HASH_SHA3_384
IMAGE_HEADER_SIZE=1024
```

Note: If not using Position Independent Code (PIC) the linker script `ldscript.ld` must have the start address offset to match the `WOLFBOOT_LOAD_ADDRESS`.

## Generate signing key
Expand Down Expand Up @@ -91,9 +99,13 @@ Xilinx uses a `bootgen` tool for generating a boot binary image that has Xilinx
* Use "offset=" option to place the application into a specific location in flash.
* Use "load=" option to have FSBL load into specific location in RAM.

Generating a boot.bin (from boot.bif).
Run the Xilinx -> Vitis Shell and cd into the workspace root.
Default install locations for bootgen tools:
* Linux: `/tools/Xilinx/Vitis/2022.1/bin`
* Windows: `C:\Xilinx\Vitis\2022.1\bin`

Open the Vitis Shell from the IDE by using file menu "Xilinx" -> "Vitis Shell".

Generating a boot.bin (from boot.bif).
Example boot.bif in workspace root:

```
Expand All @@ -107,6 +119,10 @@ the_ROM_image:
}
```

Note: If using the wolfboot.elf compiled from our makefile use "exception_level=el-3".

From the workspace root:

```sh
bootgen -image boot.bif -arch zynqmp -w -o BOOT.bin

Expand Down Expand Up @@ -184,7 +200,7 @@ Successfully ran Hello World application
```

6. Build “boot.bin” image:
* `bootgen.exe -image boot.bif -arch zynqmp -o i BOOT.BIN -w`
* `bootgen -image boot.bif -arch zynqmp -o i BOOT.BIN -w`

Note: To generate a report of a boot.bin use the `bootgen_utility`:
`bootgen_utility -arch zynqmp -bin boot.bin -out boot.bin.txt`
Expand All @@ -207,7 +223,8 @@ WOLFSSL_XMSS_VERIFY_ONLY
WOLFSSL_XMSS_MAX_HEIGHT=32
WOLFBOOT_SHA_BLOCK_SIZE=4096
IMAGE_SIGNATURE_SIZE=2500
IMAGE_HEADER_SIZE=4096
XMSS_IMAGE_SIGNATURE_SIZE=2500
IMAGE_HEADER_SIZE=5000
```

2) Create and sign image:
Expand Down
26 changes: 18 additions & 8 deletions arch.mk
Original file line number Diff line number Diff line change
Expand Up @@ -62,13 +62,29 @@ endif
## ARM Cortex-A
ifeq ($(ARCH),AARCH64)
CROSS_COMPILE?=aarch64-none-elf-
CFLAGS+=-DARCH_AARCH64 -march=armv8-a
CFLAGS+=-DARCH_AARCH64
OBJS+=src/boot_aarch64.o src/boot_aarch64_start.o
CFLAGS+=-DNO_QNX

ifeq ($(TARGET),zynq)
CFLAGS+=-march=armv8-a+crypto -DCORTEX_A53
CFLAGS+=-DNO_QNX

# Support detection and skip of U-Boot legecy header */
CFLAGS+=-DWOLFBOOT_UBOOT_LEGACY
CFLAGS+=-DWOLFBOOT_DUALBOOT
endif

ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_arm64.o
endif
ifeq ($(NO_ASM),0)
ARCH_FLAGS=-mstrict-align
CFLAGS+=$(ARCH_FLAGS) -DWOLFSSL_ARMASM -DWOLFSSL_ARMASM_INLINE -DWC_HASH_DATA_ALIGNMENT=8
WOLFCRYPT_OBJS += lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha256.o \
lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha3-asm_c.o \
lib/wolfssl/wolfcrypt/src/port/arm/armv8-aes.o
endif
endif

## ARM Cortex-M
Expand Down Expand Up @@ -759,12 +775,6 @@ ifeq ($(TARGET),nxp_p1021)
SPI_TARGET=nxp
endif

ifeq ($(TARGET),zynq)
# Support detection and skip of U-Boot legecy header */
CFLAGS+=-DWOLFBOOT_UBOOT_LEGACY
CFLAGS+=-DWOLFBOOT_DUALBOOT
endif

ifeq ($(TARGET),ti_hercules)
# HALCoGen Source and Include?
CORTEX_R5=1
Expand Down
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