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(Under Verification) [TDM] adjust tdm format and fix some driver issues #6968

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Merged
merged 3 commits into from
Sep 26, 2025
Merged

(Under Verification) [TDM] adjust tdm format and fix some driver issues #6968

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ea083ef
os/arch/arm/src/amebasmart: use left justified TDM
lhenry-realtek Sep 16, 2025
c9b207c
os/board/rtl8730e: fix WS length and FIFO reset
lhenry-realtek Sep 16, 2025
145c156
os/board/rtl8730e: make WCLK continuous in TDM operation
lhenry-realtek Sep 25, 2025
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21 changes: 11 additions & 10 deletions os/arch/arm/src/amebasmart/amebasmart_i2s.c
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Original file line number Diff line number Diff line change
Expand Up @@ -288,7 +288,7 @@ static const struct amebasmart_i2s_config_s amebasmart_i2s2_tdm_config = {
.rxenab = 1,
.txenab = 0,
.tdmenab = 1,
.data_format = SP_DF_I2S
.data_format = SP_DF_LEFT
};
#endif

Expand Down Expand Up @@ -1274,8 +1274,8 @@ void i2s_transfer_rx_handleirq(void *data, char *pbuf)
if (DMA_Done && DMA_Done_1) {
//dbg("rx complete 8CH! stopping clockgen! APB: %p\n", priv->apb_rx);

/* stop clockgen */
ameba_i2s_tdm_pause(obj);
/* stop DMA, but retain clockgen */
ameba_i2s_tdm_pause(obj, ENABLE);

/* INTERNAL channel will have SLOT 1,2 followed by 5,6 */
/* EXTERNAL channel will have SLOT 3,4 followed by 7,8 */
Expand All @@ -1292,7 +1292,7 @@ void i2s_transfer_rx_handleirq(void *data, char *pbuf)
u16 *dst_buf = (u16 *)priv->apb_rx->samp;
u16 *dma1 = (u16 *)priv->i2s_rx_buf;
u16 *dma2 = (u16 *)priv->i2s_rx_buf_ext;
lldbg("@@@@@@@@ DST BUF SIZE: %d |||| DMA PAGE SIZE: %d\n", priv->apb_rx->nmaxbytes, I2S_DMA_PAGE_SIZE);
//lldbg("@@@@@@@@ DST BUF SIZE: %d |||| DMA PAGE SIZE: %d\n", priv->apb_rx->nmaxbytes, I2S_DMA_PAGE_SIZE);
// lib_dumpbuffer("Int", dma1, 512);
// lib_dumpbuffer("Ext", dma2, 512);
u32 count = 0;
Expand Down Expand Up @@ -1355,8 +1355,9 @@ void i2s_transfer_rx_handleirq(void *data, char *pbuf)
}
} else {
if (DMA_Done) {
/* stop clockgen */
ameba_i2s_tdm_pause(obj);
/* stop DMA, but retain clockgen */
ameba_i2s_tdm_pause(obj, ENABLE);

/* copy DMA contents into buffer container ? */
// TODO: for single channel DMA populate the buffer

Expand Down Expand Up @@ -1692,7 +1693,7 @@ static int i2s_pause(struct i2s_dev_s *dev, i2s_ch_dir_t dir)
if (dir == I2S_TX && priv->txenab) {
#if defined(I2S_HAVE_TDM) && (0 < I2S_HAVE_TDM)
if (priv->tdmenab) {
ameba_i2s_tdm_pause(priv->i2s_object);
ameba_i2s_tdm_pause(priv->i2s_object, DISABLE);
} else {
ameba_i2s_pause(priv->i2s_object);
}
Expand All @@ -1707,7 +1708,7 @@ static int i2s_pause(struct i2s_dev_s *dev, i2s_ch_dir_t dir)
if (dir == I2S_RX && priv->rxenab) {
#if defined(I2S_HAVE_TDM) && (0 < I2S_HAVE_TDM)
if (priv->tdmenab) {
ameba_i2s_tdm_pause(priv->i2s_object);
ameba_i2s_tdm_pause(priv->i2s_object, DISABLE);
} else {
ameba_i2s_pause(priv->i2s_object);
}
Expand Down Expand Up @@ -1797,7 +1798,7 @@ static int i2s_stop_transfer(struct i2s_dev_s *dev, i2s_ch_dir_t dir)
#if defined(I2S_HAVE_TX) && (0 < I2S_HAVE_TX)
#if defined(I2S_HAVE_TDM) && (0 < I2S_HAVE_TDM)
if (dir == I2S_TX && priv->tdmenab) {
ameba_i2s_tdm_pause(priv->i2s_object);
ameba_i2s_tdm_pause(priv->i2s_object, DISABLE);
} else {
ameba_i2s_pause(priv->i2s_object);
}
Expand All @@ -1812,7 +1813,7 @@ static int i2s_stop_transfer(struct i2s_dev_s *dev, i2s_ch_dir_t dir)
#if defined(I2S_HAVE_RX) && (0 < I2S_HAVE_RX)
#if defined(I2S_HAVE_TDM) && (0 < I2S_HAVE_TDM)
if (dir == I2S_RX && priv->tdmenab) {
ameba_i2s_tdm_pause(priv->i2s_object);
ameba_i2s_tdm_pause(priv->i2s_object, DISABLE);
} else {
ameba_i2s_pause(priv->i2s_object);
}
Expand Down
63 changes: 38 additions & 25 deletions os/board/rtl8730e/src/component/mbed/targets/hal/rtl8730e/i2s_api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -867,17 +867,10 @@ void ameba_i2s_pause(i2s_t *obj) {
}

#ifdef CONFIG_AMEBASMART_I2S_TDM
void ameba_i2s_tdm_pause(i2s_t *obj) {
void ameba_i2s_tdm_pause(i2s_t *obj, u8 keep_clock) {

SP_GDMA_STRUCT *l_SPGdmaStruct = &SPGdmaStruct;

// turn off MCLK if master
if (obj->role == MASTER) {
AUDIO_SP_SetMclk(obj->i2s_idx, DISABLE);
}

// turn off BCLK
AUDIO_SP_EnableBclk(obj->i2s_idx, DISABLE);

if (obj->direction == I2S_DIR_TX) {
GDMA_ClearINT(l_SPGdmaStruct->SpTxGdmaInitStruct.GDMA_Index, l_SPGdmaStruct->SpTxGdmaInitStruct.GDMA_ChNum);
Expand All @@ -887,8 +880,20 @@ void ameba_i2s_tdm_pause(i2s_t *obj) {
GDMA_Suspend(l_SPGdmaStruct->SpRxGdmaInitStruct.GDMA_Index, l_SPGdmaStruct->SpRxGdmaInitStruct.GDMA_ChNum);
GDMA_Suspend(l_SPGdmaStruct->SpRxGdmaInitStructExt.GDMA_Index, l_SPGdmaStruct->SpRxGdmaInitStructExt.GDMA_ChNum);
AUDIO_SP_DmaCmd(obj->i2s_idx, DISABLE);
AUDIO_SP_RXStart(obj->i2s_idx, DISABLE);
}

if (keep_clock == DISABLE) {
// turn off MCLK if master
if (obj->role == MASTER) {
AUDIO_SP_SetMclk(obj->i2s_idx, DISABLE);
}

// turn off BCLK
AUDIO_SP_EnableBclk(obj->i2s_idx, DISABLE);

// WCLK?
AUDIO_SP_RXStart(obj->i2s_idx, DISABLE);
}
}
#endif

Expand All @@ -915,37 +920,42 @@ void ameba_i2s_tdm_resume(i2s_t *obj) {
u32 *pbuf_int, pbuf_ext;
u8 res0, res1;

// turn on MCLK if master
if (obj->role == MASTER) {
AUDIO_SP_SetMclk(obj->i2s_idx, ENABLE);
}

// turn on BCLK
AUDIO_SP_EnableBclk(obj->i2s_idx, ENABLE);

if (obj->direction == I2S_DIR_TX) {
AUDIO_SP_DmaCmd(obj->i2s_idx, ENABLE);
AUDIO_SP_TXStart(obj->i2s_idx, ENABLE);
} else {
pbuf_int = (u32 *)i2s_tdm_get_free_rx_page(obj->i2s_idx, GDMA_INT);

/* Setup the RX Length to be equal to what the OS layer wants to obtain, even though we allocate a big page size up to 4K */
res0 = AUDIO_SP_RXGDMA_Init(obj->i2s_idx, GDMA_INT, &sp_str->SpRxGdmaInitStruct, sp_str, (IRQ_FUN)i2s_tdm_rx_isr, (u8 *)pbuf_int, sp_rx_info.rx_request_length);
/* reset gdma flags */
DMA_Done = 0;

u32 dma_request_length = sp_rx_info.rx_request_length;

if (obj->fifo_num >= SP_RX_FIFO8) {
dma_request_length = sp_rx_info.rx_request_length / 2;
pbuf_ext = (u32 *)i2s_tdm_get_free_rx_page(obj->i2s_idx, GDMA_EXT);
res1 = AUDIO_SP_RXGDMA_Init(obj->i2s_idx, GDMA_EXT, &sp_str->SpRxGdmaInitStructExt, sp_str, (IRQ_FUN)i2s_tdm_rx_isr_ext, (u8 *)pbuf_ext, sp_rx_info_ext.rx_request_length);
res1 = AUDIO_SP_RXGDMA_Init(obj->i2s_idx, GDMA_EXT, &sp_str->SpRxGdmaInitStructExt, sp_str, (IRQ_FUN)i2s_tdm_rx_isr_ext, (u8 *)pbuf_ext, dma_request_length);
/* reset gdma flags */
DMA_Done_1 = 0;
}

/* Setup the RX Length to be equal to what the OS layer wants to obtain, even though we allocate a big page size up to 4K */
res0 = AUDIO_SP_RXGDMA_Init(obj->i2s_idx, GDMA_INT, &sp_str->SpRxGdmaInitStruct, sp_str, (IRQ_FUN)i2s_tdm_rx_isr, (u8 *)pbuf_int, dma_request_length);
/* reset gdma flags */
DMA_Done = 0;

AUDIO_SP_DmaCmd(obj->i2s_idx, ENABLE);

/* Enable GDMA and SPORT handshake*/
AUDIO_SP_RXStart(obj->i2s_idx, ENABLE);

AUDIO_SP_RXSetFifo(obj->i2s_idx, SP_InitStruct.SP_SelFIFO, ENABLE);
}

// turn on MCLK if master
if (obj->role == MASTER) {
AUDIO_SP_SetMclk(obj->i2s_idx, ENABLE);
}

// turn on BCLK
AUDIO_SP_EnableBclk(obj->i2s_idx, ENABLE);
}
#endif

Expand Down Expand Up @@ -1026,6 +1036,8 @@ static void i2s_tdm_rx_isr(void *sp_data)
GDMA_Cmd(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, DISABLE);
GDMA_ChnlFree(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum);

AUDIO_SP_RXSetFifo(i2s_index, SP_InitStruct.SP_SelFIFO, DISABLE);

i2s_release_rx_page(i2s_index);

/* set flag to inform os layer */
Expand All @@ -1049,6 +1061,8 @@ static void i2s_tdm_rx_isr_ext(void *sp_data)
GDMA_Cmd(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, DISABLE);
GDMA_ChnlFree(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum);

AUDIO_SP_RXSetFifo(i2s_index, SP_InitStruct.SP_SelFIFO, DISABLE);

i2s_release_rx_page(i2s_index);

/* set flag to inform os layer */
Expand Down Expand Up @@ -1185,8 +1199,7 @@ void i2s_tdm_set_param(i2s_t *obj, int channel_num, int rate, int word_len)

AUDIO_SP_Init(obj->i2s_idx, obj->direction, &SP_InitStruct);

/* set up rx bit delay */
//AUDIO_SP_SetRXBitDelay(obj->i2s_idx, 1); // 1 bit delay...?
AUDIO_SP_SetBCLK_Inverse(obj->i2s_idx, ENABLE);

/* setup the role of the SPORT */
AUDIO_SP_SetMasterSlave(obj->i2s_idx, obj->role);
Expand Down
1 change: 1 addition & 0 deletions os/board/rtl8730e/src/component/soc/amebad2/fwlib/include/ameba_sport.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1100,6 +1100,7 @@ _LONG_CALL_ void AUDIO_SP_SetTXCounter(u32 index, u32 state);
_LONG_CALL_ void AUDIO_SP_SetTXCounterCompVal(u32 index, u32 comp_val);
_LONG_CALL_ void AUDIO_SP_ClearTXCounterIrq(u32 index);
_LONG_CALL_ void AUDIO_SP_SetPhaseLatch(u32 index);
_LONG_CALL_ void AUDIO_SP_SetBCLK_Inverse(u32 index, u8 enable);
_LONG_CALL_ u32 AUDIO_SP_GetTXCounterVal(u32 index);
_LONG_CALL_ u32 AUDIO_SP_GetTXPhaseVal(u32 index);
_LONG_CALL_ void AUDIO_SP_SetRXCounter(u32 index, u32 state);
Expand Down
10 changes: 10 additions & 0 deletions os/board/rtl8730e/src/component/soc/amebad2/fwlib/ram_hp/ameba_sport.c
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Expand Up @@ -1590,6 +1590,16 @@ void AUDIO_SP_SetPhaseLatch(u32 index)
SPORTx->SP_RX_LRCLK |= SP_BIT_EN_FS_PHASE_LATCH;
}

void AUDIO_SP_SetBCLK_Inverse(u32 index, u8 enable)
{
AUDIO_SPORT_TypeDef *SPORTx = AUDIO_DEV_TABLE[index].SPORTx;
if (enable) {
SPORTx->SP_CTRL0 |= SP_BIT_INV_I2S_SCLK;
} else {
SPORTx->SP_CTRL0 &= ~SP_BIT_INV_I2S_SCLK;
}
}

/**
* @brief Set SPORT tx counter value.
* @param index: select SPORT.
Expand Down