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fix(PeriphDrivers): Fix SDHC Peripheral Failure for Alternative System Clocks #1041

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merged 3 commits into from
Jul 1, 2024
Merged

fix(PeriphDrivers): Fix SDHC Peripheral Failure for Alternative System Clocks #1041

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e9e609b
According to the UG, SDHC peripheral is driven by always 96 MHz. Ther…
Jun 11, 2024
769abc5
The modifications on the SDHC related driver codes for the remaining …
Jun 30, 2024
63d65ad
The HIRC96_FREQ is reverted back from HIRC120_FREQ because it is used…
Jun 30, 2024
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8 changes: 4 additions & 4 deletions Libraries/PeriphDrivers/Source/SDHC/sdhc_ai87.c
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Original file line number Diff line number Diff line change
Expand Up @@ -68,17 +68,17 @@ int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
{
// Figure 4-1 of the preliminary AI85 UG (04/01/2022) shows the SDHC hardware block
// connected directly to the SYS_CLK node. This is most likely inaccurate, but the
// connected directly to the IPO Clock node. This is most likely inaccurate, but the
// register description for MXC_GCR->pclkdiv marks the usual SDHC divider as reserved.
// We will follow figure 4-1 for now.

if (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIS1_SDHC) {
return SystemCoreClock >> 2; // Div by 4
return IPO_FREQ >> 2; // Div by 4
} else {
return SystemCoreClock >> 1; // Div by 2
return IPO_FREQ >> 1; // Div by 2
}

return SystemCoreClock;
return IPO_FREQ;
}

/* ************************************************************************** */
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4 changes: 2 additions & 2 deletions Libraries/PeriphDrivers/Source/SDHC/sdhc_me10.c
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Expand Up @@ -85,9 +85,9 @@ unsigned int MXC_SDHC_Get_Clock_Config(void)
unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
{
if (MXC_GCR->pclk_div & MXC_F_GCR_PCLK_DIV_SDHCFRQ) {
return SystemCoreClock >> 1; // Div by 2
return HIRC96_FREQ >> 1; // Div by 2
} else {
return 50000000; // UG specifies a hard-coded 50Mhz value in this case
return 50000000; // UG specifies a hard-coded 50Mhz low-power oscillator
}
}

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4 changes: 2 additions & 2 deletions Libraries/PeriphDrivers/Source/SDHC/sdhc_me13.c
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Expand Up @@ -68,9 +68,9 @@ unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
{
// TODO(JC): Confirm this is the scheme used by ME13
if (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_SDHCFRQ) {
return SystemCoreClock >> 2; // Div by 4
return IPO_FREQ >> 2; // Div by 4
} else {
return SystemCoreClock >> 1; // Div by 2
return IPO_FREQ >> 1; // Div by 2
}
}

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4 changes: 2 additions & 2 deletions Libraries/PeriphDrivers/Source/SDHC/sdhc_me14.c
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Expand Up @@ -68,9 +68,9 @@ int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
{
if (MXC_GCR->pckdiv & MXC_F_GCR_PCKDIV_SDHCFRQ) {
return SystemCoreClock >> 2; // Div by 4
return HIRC96_FREQ >> 2; // Div by 4
} else {
return SystemCoreClock >> 1; // Div by 2
return HIRC96_FREQ >> 1; // Div by 2
}
}

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