feat(riscv): Add an extended setting function for the sstatus register; Refresh all instruction caches before entering the user program space to resolve user program errors#36
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elliott10 wants to merge 1 commit intoarceos-org:mainfrom
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elliott10
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Apr 10, 2026
elliott10
commented
- Add an extended setting function for the sstatus register;
- Refresh all instruction caches before entering the user program space to resolve user program errors
- Add feature of T-Head CPU xuantie-c9xx
And, before entering the user program space, refresh all instruction caches to resolve user program errors that occur on xuantie-c9xx platform; Add feature of T-Head CPU xuantie-c9xx;
aarkegz
reviewed
Apr 14, 2026
| self.0.regs.sp | ||
| } | ||
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| /// Sets the sstatus register. |
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Could this fn be xuantie-specific?
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