Merge pull request #3931 from alainmarcel/alainmarcel-patch-1

packed_array_var fix
chipsalliance · Dec 3, 2023 · 02876e4 · 02876e4
2 parents 5dd6f20 + 817a850
commit 02876e4
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Showing 13 changed files with 1,055 additions and 37 deletions.
diff --git a/src/DesignCompile/CompileType.cpp b/src/DesignCompile/CompileType.cpp
@@ -144,6 +144,7 @@ variables* CompileHelper::getSimpleVarFromTypespec(
     case uhdmlogic_typespec: {
       logic_var* logicv = s.MakeLogic_var();
       var = logicv;
+
       if (packedDimensions) {
         packed_array_var* array = s.MakePacked_array_var();
         VectorOfany* vars = s.MakeAnyVec();
@@ -154,11 +155,13 @@ variables* CompileHelper::getSimpleVarFromTypespec(
         var->VpiParent(array);
         var = array;
       }
+
       break;
     }
     case uhdmvoid_typespec: {
       logic_var* logicv = s.MakeLogic_var();
       var = logicv;
+      break;
     }
     case uhdmunion_typespec: {
       UHDM::union_var* unionv = s.MakeUnion_var();

diff --git a/tests/FuncStruct/FuncStruct.log b/tests/FuncStruct/FuncStruct.log
@@ -246,50 +246,50 @@ AST_DEBUG_END
 assignment                                             6
 begin                                                  2
 bit_select                                             6
-constant                                              87
+constant                                              91
 cont_assign                                            4
 design                                                 1
 func_call                                              2
 function                                               2
 import_typespec                                        1
 io_decl                                                4
 logic_net                                              2
-logic_typespec                                        30
+logic_typespec                                        32
 logic_var                                              7
 module_inst                                            6
 package                                                2
 packed_array_typespec                                  2
 packed_array_var                                       4
 param_assign                                           4
 parameter                                              4
-range                                                 36
+range                                                 38
 ref_obj                                                8
-ref_typespec                                          42
+ref_typespec                                          44
 === UHDM Object Stats End ===
 [INF:UH0707] Elaborating UHDM...
 === UHDM Object Stats Begin (Elaborated Model) ===
 assignment                                            12
 begin                                                  5
 bit_select                                            10
-constant                                              87
+constant                                              91
 cont_assign                                            6
 design                                                 1
 func_call                                              2
 function                                               5
 import_typespec                                        1
 io_decl                                               10
 logic_net                                              2
-logic_typespec                                        30
+logic_typespec                                        32
 logic_var                                             13
 module_inst                                            6
 package                                                2
 packed_array_typespec                                  2
 packed_array_var                                       4
 param_assign                                           4
 parameter                                              4
-range                                                 36
+range                                                 38
 ref_obj                                               15
-ref_typespec                                          54
+ref_typespec                                          56
 === UHDM Object Stats End ===
 [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FuncStruct/slpp_all/surelog.uhdm ...
 [INF:UH0709] Writing UHDM Html Coverage: ${SURELOG_DIR}/build/regression/FuncStruct/slpp_all/checker/surelog.chk.html ...
@@ -869,6 +869,13 @@ design: (work@dut)
       \_bit_select: ([email protected]), line:17:26, endln:17:27
         |vpiParent:
         \_func_call: (compress), line:17:15, endln:17:35
+        |vpiTypespec:
+        \_ref_typespec: ([email protected])
+          |vpiParent:
+          \_bit_select: ([email protected]), line:17:26, endln:17:27
+          |vpiFullName:[email protected]
+          |vpiActual:
+          \_logic_typespec: (sha_word_t), line:3:53, endln:3:63
         |vpiName:w
         |vpiFullName:[email protected]
         |vpiIndex:
@@ -946,13 +953,6 @@ design: (work@dut)
     \_logic_var: ([email protected])
       |vpiParent:
       \_packed_array_var: ([email protected]), line:14:19, endln:14:20
-      |vpiTypespec:
-      \_ref_typespec: ([email protected])
-        |vpiParent:
-        \_logic_var: ([email protected])
-        |vpiFullName:[email protected]
-        |vpiActual:
-        \_logic_typespec: (sha_word_t), line:3:53, endln:3:63
       |vpiFullName:[email protected]
   |vpiVariables:
   \_packed_array_var: ([email protected]), line:15:18, endln:15:22