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Correct assign_stmt to assignment #3925

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merged 2 commits into from
Nov 9, 2023
Merged

Correct assign_stmt to assignment #3925

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34fdf0d
Correct assign_stmt to assignment
alaindargelas Nov 9, 2023
20f0ff8
Correct assign_stmt to assignment
alaindargelas Nov 9, 2023
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2 changes: 1 addition & 1 deletion .github/workflows/non_vendored.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ jobs:
cmake -B build -DCMAKE_BUILD_TYPE=Release -DCMAKE_CXX_STANDARD=17 -DCMAKE_POSITION_INDEPENDENT_CODE=ON -DJSON_BuildTests=OFF . && cmake --build build && sudo cmake --install build
popd

git clone --depth 1 --branch v1.78 https://github.com/chipsalliance/UHDM.git
git clone --depth 1 --branch v1.79 https://github.com/chipsalliance/UHDM.git
pushd UHDM
cmake -B build -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON -DUHDM_USE_HOST_GTEST=ON -DUHDM_USE_HOST_CAPNP=ON . && cmake --build build && sudo cmake --install build
popd
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2 changes: 1 addition & 1 deletion .gitmodules
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Expand Up @@ -7,7 +7,7 @@
[submodule "third_party/UHDM"]
path = third_party/UHDM
url = https://github.com/chipsalliance/UHDM.git
branch = v1.78
branch = v1.79
[submodule "third_party/antlr4"]
path = third_party/antlr4
url = https://github.com/antlr/antlr4.git
Expand Down
19 changes: 19 additions & 0 deletions .vscode/launch.json
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Original file line number Diff line number Diff line change
Expand Up @@ -545,6 +545,25 @@
}
]
},
{
"name": "SimpleVMM",
"type": "cppdbg",
"request": "launch",
"program": "${workspaceFolder}/dbuild/bin/surelog",
"args": ["top.v", "-parse", "-sverilog", "-verbose", "-fileunit", "+incdir+../../UVM/ovm-2.1.2/src/", "+incdir+../../UVM/vmm-1.1.1a/sv"],
"stopAtEntry": false,
"cwd": "${workspaceFolder}/third_party/tests/SimpleVMM/",
"environment": [],
"externalConsole": false,
"MIMode": "gdb",
"setupCommands": [
{
"description": "Enable pretty-printing for gdb",
"text": "-enable-pretty-printing",
"ignoreFailures": true
}
]
},
{
"name": "TestBatchMode",
"type": "cppdbg",
Expand Down
2 changes: 1 addition & 1 deletion CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ cmake_minimum_required(VERSION 3.20 FATAL_ERROR)
# Version changes whenever some new features accumulated, or the
# grammar or the cache format changes to make sure caches
# are invalidated.
project(SURELOG VERSION 1.78)
project(SURELOG VERSION 1.79)

# Detect build type, fallback to release and throw a warning if use didn't
# specify any
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2 changes: 1 addition & 1 deletion src/DesignCompile/CompileAssertion.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -475,7 +475,7 @@ UHDM::property_decl* CompileHelper::compilePropertyDeclaration(
compileDesign, Reduce::No, pstmt, instance);
if (varst) {
for (auto v : *varst) {
if (UHDM::assign_stmt* vast = any_cast<UHDM::assign_stmt*>(v)) {
if (UHDM::assignment* vast = any_cast<UHDM::assignment*>(v)) {
if (UHDM::variables* va = any_cast<UHDM::variables*>(vast->Lhs())) {
vars->push_back(va);
}
Expand Down
2 changes: 1 addition & 1 deletion src/DesignCompile/CompileGenStmt.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -308,7 +308,7 @@ UHDM::VectorOfgen_stmt* CompileHelper::compileGenStmt(

NodeId Var = fC->Child(varInit);
NodeId Expression = fC->Sibling(Var);
assign_stmt* assign_stmt = s.MakeAssign_stmt();
assignment* assign_stmt = s.MakeAssignment();
assign_stmt->VpiParent(genfor);
fC->populateCoreMembers(varInit, varInit, assign_stmt);
if (variables* varb = (variables*)compileVariable(
Expand Down
3 changes: 2 additions & 1 deletion src/DesignCompile/CompileModule.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@
// UHDM
#include <uhdm/always.h>
#include <uhdm/assign_stmt.h>
#include <uhdm/assignment.h>
#include <uhdm/constant.h>
#include <uhdm/final_stmt.h>
#include <uhdm/initial.h>
Expand Down Expand Up @@ -468,7 +469,7 @@ bool CompileModule::collectUdpObjects_() {
fC->populateCoreMembers(id, id, init);
init->VpiParent(defn);
defn->Initial(init);
UHDM::assign_stmt* assign_stmt = s.MakeAssign_stmt();
UHDM::assignment* assign_stmt = s.MakeAssignment();
init->Stmt(assign_stmt);
UHDM::ref_obj* ref = s.MakeRef_obj();
ref->VpiName(fC->SymName(Identifier));
Expand Down
61 changes: 35 additions & 26 deletions src/DesignCompile/CompileStmt.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -336,11 +336,11 @@ VectorOfany* CompileHelper::compileStmt(DesignComponent* component,
stmt, instance, muteErrors)) {
for (any* cstmt : *cstmts) {
bool isDecl = false;
if (cstmt->UhdmType() == uhdmassign_stmt) {
assign_stmt* assign = (assign_stmt*)cstmt;
if (cstmt->UhdmType() == uhdmassignment) {
assignment* assign = (assignment*)cstmt;
if (assign->Rhs() == nullptr) {
isDecl = true;
((variables*)assign->Lhs())->VpiParent(stmt);
if (assign->Lhs()) ((variables*)assign->Lhs())->VpiParent(stmt);
}
} else if (cstmt->UhdmType() == uhdmsequence_decl) {
VectorOfsequence_decl* decls = scope->Sequence_decls();
Expand Down Expand Up @@ -418,17 +418,19 @@ VectorOfany* CompileHelper::compileStmt(DesignComponent* component,
stmt, instance, muteErrors)) {
for (any* cstmt : *cstmts) {
bool isDecl = false;
if (cstmt->UhdmType() == uhdmassign_stmt) {
assign_stmt* assign = (assign_stmt*)cstmt;
if (cstmt->UhdmType() == uhdmassignment) {
assignment* assign = (assignment*)cstmt;
if (assign->Rhs() == nullptr) {
VectorOfvariables* vars = scope->Variables();
if (vars == nullptr) {
isDecl = true;
vars = s.MakeVariablesVec();
scope->Variables(vars);
}
vars->push_back((UHDM::variables*)assign->Lhs());
((variables*)assign->Lhs())->VpiParent(stmt);
if (assign->Lhs()) {
vars->push_back((UHDM::variables*)assign->Lhs());
((variables*)assign->Lhs())->VpiParent(stmt);
}
}
}
if (!isDecl) {
Expand Down Expand Up @@ -1241,7 +1243,9 @@ VectorOfany* CompileHelper::compileDataDeclaration(
if (results == nullptr) {
results = s.MakeAnyVec();
}
assign_stmt* assign_stmt = s.MakeAssign_stmt();
assignment* assign_stmt = s.MakeAssignment();
assign_stmt->VpiOpType(vpiAssignmentOp);
assign_stmt->VpiBlocking(true);
if (var) {
var->VpiParent(assign_stmt);
assign_stmt->Lhs(var);
Expand Down Expand Up @@ -2064,8 +2068,9 @@ bool CompileHelper::compileTask(DesignComponent* component,
}
if (param_assign* pst = any_cast<param_assign*>(st))
param_assigns->push_back(pst);
} else if (stmt_type == uhdmassign_stmt) {
assign_stmt* stmt = (assign_stmt*)st;
}
if (stmt_type == uhdmassignment) {
assignment* stmt = (assignment*)st;
if (stmt->Rhs() == nullptr ||
any_cast<variables*>((expr*)stmt->Lhs())) {
// Declaration
Expand All @@ -2074,11 +2079,12 @@ bool CompileHelper::compileTask(DesignComponent* component,
task->Variables(s.MakeVariablesVec());
vars = task->Variables();
}
vars->push_back((variables*)stmt->Lhs());
if (stmt->Lhs()) vars->push_back((variables*)stmt->Lhs());
if (stmt->Rhs() != nullptr) {
stmts->push_back(st);
} else {
any_cast<variables*>((expr*)stmt->Lhs())->VpiParent(begin);
if (variables* var = any_cast<variables*>((expr*)stmt->Lhs()))
var->VpiParent(begin);
// s.Erase(stmt);
}
} else {
Expand Down Expand Up @@ -2110,8 +2116,8 @@ bool CompileHelper::compileTask(DesignComponent* component,
}
if (param_assign* pst = any_cast<param_assign*>(st))
param_assigns->push_back(pst);
} else if (stmt_type == uhdmassign_stmt) {
assign_stmt* stmt = (assign_stmt*)st;
} else if (stmt_type == uhdmassignment) {
assignment* stmt = (assignment*)st;
if (stmt->Rhs() == nullptr ||
any_cast<variables*>((expr*)stmt->Lhs())) {
// Declaration
Expand All @@ -2120,11 +2126,12 @@ bool CompileHelper::compileTask(DesignComponent* component,
task->Variables(s.MakeVariablesVec());
vars = task->Variables();
}
vars->push_back((variables*)stmt->Lhs());
if (stmt->Lhs()) vars->push_back((variables*)stmt->Lhs());
if (stmt->Rhs() != nullptr) {
task->Stmt(st);
} else {
any_cast<variables*>((expr*)stmt->Lhs())->VpiParent(task);
if (variables* var = any_cast<variables*>((expr*)stmt->Lhs()))
var->VpiParent(task);
// s.Erase(stmt);
}
} else {
Expand Down Expand Up @@ -2481,8 +2488,8 @@ bool CompileHelper::compileFunction(DesignComponent* component,
}
if (param_assign* pst = any_cast<param_assign*>(st))
param_assigns->push_back(pst);
} else if (stmt_type == uhdmassign_stmt) {
assign_stmt* stmt = (assign_stmt*)st;
} else if (stmt_type == uhdmassignment) {
assignment* stmt = (assignment*)st;
if (stmt->Rhs() == nullptr ||
any_cast<variables*>((expr*)stmt->Lhs())) {
// Declaration
Expand All @@ -2491,11 +2498,12 @@ bool CompileHelper::compileFunction(DesignComponent* component,
func->Variables(s.MakeVariablesVec());
vars = func->Variables();
}
vars->push_back((variables*)stmt->Lhs());
if (stmt->Lhs()) vars->push_back((variables*)stmt->Lhs());
if (stmt->Rhs() != nullptr) {
stmts->push_back(st);
} else {
any_cast<variables*>((expr*)stmt->Lhs())->VpiParent(begin);
if (variables* var = any_cast<variables*>((expr*)stmt->Lhs()))
var->VpiParent(begin);
// s.Erase(stmt);
}
} else {
Expand Down Expand Up @@ -2527,8 +2535,8 @@ bool CompileHelper::compileFunction(DesignComponent* component,
}
if (param_assign* pst = any_cast<param_assign*>(st))
param_assigns->push_back(pst);
} else if (stmt_type == uhdmassign_stmt) {
assign_stmt* stmt = (assign_stmt*)st;
} else if (stmt_type == uhdmassignment) {
assignment* stmt = (assignment*)st;
if (stmt->Rhs() == nullptr ||
any_cast<variables*>((expr*)stmt->Lhs())) {
// Declaration
Expand All @@ -2537,11 +2545,12 @@ bool CompileHelper::compileFunction(DesignComponent* component,
func->Variables(s.MakeVariablesVec());
vars = func->Variables();
}
vars->push_back((variables*)stmt->Lhs());
if (stmt->Lhs()) vars->push_back((variables*)stmt->Lhs());
if (stmt->Rhs() != nullptr) {
func->Stmt(st);
} else {
any_cast<variables*>((expr*)stmt->Lhs())->VpiParent(func);
if (variables* var = any_cast<variables*>((expr*)stmt->Lhs()))
var->VpiParent(func);
// s.Erase(stmt);
}
} else {
Expand Down Expand Up @@ -2837,7 +2846,7 @@ UHDM::any* CompileHelper::compileForLoop(DesignComponent* component,
NodeId Data_type = fC->Child(For_variable_declaration);
NodeId Var = fC->Sibling(Data_type);
NodeId Expression = fC->Sibling(Var);
assign_stmt* assign_stmt = s.MakeAssign_stmt();
assignment* assign_stmt = s.MakeAssignment();
assign_stmt->VpiParent(for_stmt);
fC->populateCoreMembers(For_variable_declaration,
For_variable_declaration, assign_stmt);
Expand Down Expand Up @@ -2884,7 +2893,7 @@ UHDM::any* CompileHelper::compileForLoop(DesignComponent* component,
stmts = for_stmt->VpiForInitStmts();
}

assign_stmt* assign_stmt = s.MakeAssign_stmt();
assignment* assign_stmt = s.MakeAssignment();
assign_stmt->VpiParent(for_stmt);
fC->populateCoreMembers(Variable_assignment, Variable_assignment,
assign_stmt);
Expand Down