Tmp branch with this tmp fix

src/DesignCompile/UhdmWriter.cpp

@@ -4555,6 +4555,107 @@ void UhdmWriter::writeInstance(ModuleDefinition* mod, ModuleInstance* instance,
   }
 }
 
+class AlwaysWithForLoop : public VpiListener {
+ public:
+  explicit AlwaysWithForLoop() {}
+  ~AlwaysWithForLoop() override = default;
+  void leaveFor_stmt(const for_stmt* object, vpiHandle handle) override {
+    containtsForStmt = true;
+  }
+  bool containtsForStmt = false;
+};
+
+bool alwaysContainsForLoop(Serializer& serializer, any* root) {
+  AlwaysWithForLoop* listener = new AlwaysWithForLoop();
+  vpiHandle handle = serializer.MakeUhdmHandle(root->UhdmType(), root);
+  listener->listenAny(handle);
+  vpi_release_handle(handle);
+  bool result = listener->containtsForStmt;
+  delete listener;
+  return result;
+}
+
+// synlig has a major problem processing always blocks.
+// They are processed mainly in the allModules section which is incorrect in
+// some case. They should be processed from the topModules section. Here we try
+// to fix temporarily this by filtering out the always blocks containing
+// for-loops from the allModules, and those without from the topModules
+void filterAlwaysBlocks(Serializer& s, design* d) {
+  if (d->AllModules()) {
+    for (auto module : *d->AllModules()) {
+      if (module->Process()) {
+        bool more = true;
+        while (more) {
+          more = false;
+          for (std::vector<process_stmt*>::iterator itr =
+                   module->Process()->begin();
+               itr != module->Process()->end(); itr++) {
+            if ((*itr)->UhdmType() == uhdmalways) {
+              if (alwaysContainsForLoop(s, (*itr))) {
+                more = true;
+                module->Process()->erase(itr);
+                break;
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+  std::queue<scope*> instances;
+  if (d->TopModules()) {
+    for (auto mod : *d->TopModules()) {
+      instances.push(mod);
+    }
+  }
+  while (!instances.empty()) {
+    scope* current = instances.front();
+    instances.pop();
+    if (current->UhdmType() == uhdmmodule_inst) {
+      module_inst* mod = (module_inst*)current;
+      if (mod->Process()) {
+        bool more = true;
+        while (more) {
+          more = false;
+          for (std::vector<process_stmt*>::iterator itr =
+                   mod->Process()->begin();
+               itr != mod->Process()->end(); itr++) {
+            if ((*itr)->UhdmType() == uhdmalways) {
+              if (!alwaysContainsForLoop(s, (*itr))) {
+                more = true;
+                mod->Process()->erase(itr);
+                break;
+              }
+            }
+          }
+        }
+      }
+      if (mod->Modules()) {
+        for (auto m : *mod->Modules()) {
+          instances.push(m);
+        }
+      }
+      if (mod->Gen_scope_arrays()) {
+        for (auto m : *mod->Gen_scope_arrays()) {
+          instances.push(m->Gen_scopes()->at(0));
+        }
+      }
+    } else if (current->UhdmType() == uhdmgen_scope) {
+      gen_scope* sc = (gen_scope*)current;
+      if (sc->Modules()) {
+        for (auto m : *sc->Modules()) {
+          instances.push(m);
+        }
+      }
+      if (sc->Gen_scope_arrays()) {
+        for (auto m : *sc->Gen_scope_arrays()) {
+          instances.push(m->Gen_scopes()->at(0));
+        }
+      }
+    }
+  }
+}
+
 vpiHandle UhdmWriter::write(PathId uhdmFileId) {
   FileSystem* const fileSystem = FileSystem::getInstance();
   ModPortMap modPortMap;
@@ -4995,6 +5096,7 @@ vpiHandle UhdmWriter::write(PathId uhdmFileId) {
       annotate->listenDesigns(designs);
       annotate->filterNonSynthesizable();
       delete annotate;
+      filterAlwaysBlocks(s, d);
     }
   }