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Don't randomly init SRAM when testing lightweight "test ROMs" #1407

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@korran korran commented Mar 13, 2024

To improve verilator times, caliptra-test-harness does not initialize SRAM contents,

PR #1404 tweaks one of these test binaries enough that the compiler generates a speculative read to uninitialized memory, which intermittently triggers an ECC double-bit error.

To prevent this from happening, we must run lightweight tests with the memory cleared to zeroes, in case the compiler generates a speculative read to uninitialized memory (this is rare, but tricky to debug when it happens).

To improve verilator times, caliptra-test-harness does not initialize
SRAM contents, so we must run our tests with the memory cleared to
zeroes, in case the compiler generates a speculative read to
uninitialized memory (this is rare, but tricky to debug when it
happens).

PR chipsalliance#1404 tweaks one of these test binaries enough that the compiler
generates a speculative read to uninitialized memory, which
intermittently triggers an ECC double-bit error.
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