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New regexes for new version of Verilator and allowing header files in document selector #237

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Aug 30, 2024
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36 changes: 35 additions & 1 deletion package.json
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
"name": "systemverilog",
"displayName": "SystemVerilog - Language Support",
"description": "Language support for Verilog and SystemVerilog.",
"version": "0.13.9",
"version": "0.13.10",
"publisher": "eirikpre",
"author": {
"name": "Eirik Prestegårdshus",
Expand Down Expand Up @@ -538,6 +538,40 @@
}
]
},
{
"name": "verilator-error-v5",
"owner": "Verilator",
"source": "systemverilog",
"severity": "error",
"fileLocation": "autoDetect",
"pattern": [
{
"regexp": "%Error(-[A-Z0-9]+)?: ((\\S+((\\.sv)|(\\.v))):(\\d+):((\\d+):)? )?(.*)$",
"severity": 1,
"file": 3,
"line": 7,
"column": 9,
"message": 10
}
]
},
{
"name": "verilator-warning-v5",
"owner": "Verilator",
"source": "systemverilog",
"severity": "warning",
"fileLocation": "autoDetect",
"pattern": [
{
"regexp": "%Warning(-[A-Z0-9]+)?: ((\\S+((\\.sv)|(\\.v))):(\\d+):((\\d+):)? )?(.*)$",
"severity": 1,
"file": 3,
"line": 7,
"column": 9,
"message": 10
}
]
},
{
"name": "verible-error",
"owner": "Verible",
Expand Down
4 changes: 2 additions & 2 deletions src/compiling/DocumentCompiler.ts
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ import { URI } from 'vscode-uri';
import * as path from 'path';
import * as child from 'child_process';
import { getPathFromUri } from '../utils/common';
import { isSystemVerilogDocument, isVerilogDocument, getLineRange } from '../utils/server';
import { isSystemVerilogDocument, isVerilogDocument, isVerilogAMSDocument, getLineRange } from '../utils/server';
import { DiagnosticData } from './DiagnosticData';

/*
Expand Down Expand Up @@ -45,7 +45,7 @@ export abstract class DocumentCompiler {
return;
}

if (!isSystemVerilogDocument(document) && !isVerilogDocument(document)) {
if (!isSystemVerilogDocument(document) && !isVerilogDocument(document) && !isVerilogAMSDocument(document)) {
reject(new Error('The document is not a SystemVerilog/Verilog file.'));
return;
}
Expand Down
6 changes: 5 additions & 1 deletion src/extension.ts
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,11 @@ let closeWindowProgress = true;

const selector: DocumentSelector = [
{ scheme: 'file', language: 'systemverilog' },
{ scheme: 'file', language: 'verilog' }
{ scheme: 'file', language: 'systemverilogheader' },
{ scheme: 'file', language: 'verilog' },
{ scheme: 'file', language: 'verilogheader' },
{ scheme: 'file', language: 'veriloga' },
{ scheme: 'file', language: 'verilogams' }
];

let indexer: SystemVerilogIndexer | undefined = undefined;
Expand Down
8 changes: 4 additions & 4 deletions src/indexer.ts
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ import { CancellationToken } from 'vscode-languageclient/node';
import * as glob from 'glob';
import * as minimatch from 'minimatch';
import { SystemVerilogParser } from './parser';
import { isSystemVerilogDocument, isVerilogDocument } from './utils/client';
import { isSystemVerilogDocument, isVerilogDocument, isVerilogAMSDocument } from './utils/client';
import { SystemVerilogSymbol } from './symbol';

export class SystemVerilogIndexer {
Expand Down Expand Up @@ -136,7 +136,7 @@ export class SystemVerilogIndexer {
if (total_files >= 100 * this.parallelProcessing) {
return this.parser.get_all_recursive(doc, 'declaration', 0);
}
if (doc.lineCount > this.maxLineCountIndexing) {
if (doc.lineCount > this.maxLineCountIndexing.valueOf()) {
window.showInformationMessage(
`The character count of ${workspace.asRelativePath(uri)} is larger than ${this.maxLineCountIndexing}. Falling back to fast parse. To fully parse this file, please set 'systemverilog.maxLineCountIndexing > ${doc.lineCount} in the systemverilog extension settings.`
); // prettier-ignore
Expand Down Expand Up @@ -182,7 +182,7 @@ export class SystemVerilogIndexer {
*/
public async onChange(document: TextDocument): Promise<any> {
return new Promise(() => {
if (!isSystemVerilogDocument(document) && !isVerilogDocument(document)) {
if (!isSystemVerilogDocument(document) && !isVerilogDocument(document) && !isVerilogAMSDocument(document)) {
return;
}
if (!workspace.getConfiguration().get('systemverilog.enableIncrementalIndexing')) {
Expand Down Expand Up @@ -237,7 +237,7 @@ export class SystemVerilogIndexer {
return;
}

if (!isSystemVerilogDocument(document) && !isVerilogDocument(document)) {
if (!isSystemVerilogDocument(document) && !isVerilogDocument(document) && !isVerilogAMSDocument(document)) {
resolve(new Array<SystemVerilogSymbol>());
return;
}
Expand Down
14 changes: 12 additions & 2 deletions src/utils/client.ts
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ import { TextDocument } from 'vscode';
@return true if the document is a SystemVerilog file
*/
export function isSystemVerilogDocument(document: TextDocument | undefined): boolean {
return document?.languageId === 'systemverilog';
return document?.languageId === 'systemverilog' || document?.languageId === 'systemverilogheader';
}

/**
Expand All @@ -17,5 +17,15 @@ export function isSystemVerilogDocument(document: TextDocument | undefined): boo
@return true if the document is a Verilog file
*/
export function isVerilogDocument(document: TextDocument | undefined): boolean {
return document?.languageId === 'verilog';
return document?.languageId === 'verilog' || document?.languageId === 'verilogheader';
}

/**
Check if a given `document` is a VerilogA/VerilogAMS file.

@param document the document to check
@return true if the document is a Verilog file
*/
export function isVerilogAMSDocument(document: TextDocument | undefined): boolean {
return document?.languageId === 'veriloga' || document?.languageId === 'verilogams';
}
14 changes: 12 additions & 2 deletions src/utils/server.ts
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ import { TextDocument } from 'vscode-languageserver-textdocument';
@return true if the document is a SystemVerilog file
*/
export function isSystemVerilogDocument(document: TextDocument | undefined): boolean {
return document?.languageId === 'systemverilog';
return document?.languageId === 'systemverilog' || document?.languageId === 'systemverilogheader';
}

/**
Expand All @@ -18,7 +18,17 @@ export function isSystemVerilogDocument(document: TextDocument | undefined): boo
@return true if the document is a Verilog file
*/
export function isVerilogDocument(document: TextDocument | undefined): boolean {
return document?.languageId === 'verilog';
return document?.languageId === 'verilog' || document?.languageId === 'verilogheader';
}

/**
Check if a given `document` is a Verilog file.

@param document the document to check
@return true if the document is a Verilog file
*/
export function isVerilogAMSDocument(document: TextDocument | undefined): boolean {
return document?.languageId === 'veriloga' || document?.languageId === 'verilogams';
}

/**
Expand Down
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