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thirdparty: update bundled SIMDE to fix link error on musl/non-glibc #684

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Merged
K-os merged 1 commit into from
Apr 13, 2026
Merged

thirdparty: update bundled SIMDE to fix link error on musl/non-glibc #684

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6 changes: 3 additions & 3 deletions thirdparty/simde/arm/neon/abd.h
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Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ simde_vabdh_f16(simde_float16_t a, simde_float16_t b) {
return r_ < 0 ? simde_float16_from_float32(-r_) : simde_float16_from_float32(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vabdh_f16
#define vabdh_f16(a, b) simde_vabdh_f16((a), (b))
#endif
Expand Down Expand Up @@ -94,7 +94,7 @@ simde_vabd_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_vabs_f16(simde_vsub_f16(a, b));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vabd_f16
#define vabd_f16(a, b) simde_vabd_f16((a), (b))
#endif
Expand Down Expand Up @@ -315,7 +315,7 @@ simde_vabdq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_vabsq_f16(simde_vsubq_f16(a, b));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vabdq_f16
#define vabdq_f16(a, b) simde_vabdq_f16((a), (b))
#endif
Expand Down
18 changes: 11 additions & 7 deletions thirdparty/simde/arm/neon/abs.h
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Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,8 @@ simde_vabsd_s64(int64_t a) {
return a < 0 ? -a : a;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,1,0)))
#undef vabsd_s64
#define vabsd_s64(a) simde_vabsd_s64(a)
#endif
Expand All @@ -60,7 +61,8 @@ simde_vabsh_f16(simde_float16_t a) {
return (a_ >= 0.0f) ? simde_float16_from_float32(a_) : simde_float16_from_float32(-a_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vabsh_f16
#define vabsh_f16(a) simde_vabsh_f16(a)
#endif
Expand All @@ -87,7 +89,8 @@ simde_vabs_f16(simde_float16x4_t a) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vabs_f16
#define vabs_f16(a) simde_vabs_f16(a)
#endif
Expand Down Expand Up @@ -166,7 +169,7 @@ simde_vabs_s8(simde_int8x8_t a) {
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = a_.values[i] < 0 ? -a_.values[i] : a_.values[i];
r_.values[i] = a_.values[i] < 0 ? HEDLEY_STATIC_CAST(int8_t, -a_.values[i]) : a_.values[i];
}
#endif

Expand Down Expand Up @@ -294,7 +297,8 @@ simde_vabsq_f16(simde_float16x8_t a) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vabsq_f16
#define vabsq_f16(a) simde_vabsq_f16(a)
#endif
Expand Down Expand Up @@ -395,7 +399,7 @@ simde_vabsq_s8(simde_int8x16_t a) {
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = a_.values[i] < 0 ? -a_.values[i] : a_.values[i];
r_.values[i] = a_.values[i] < 0 ? HEDLEY_STATIC_CAST(int8_t, -a_.values[i]) : a_.values[i];
}
#endif

Expand Down Expand Up @@ -433,7 +437,7 @@ simde_vabsq_s16(simde_int16x8_t a) {
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = a_.values[i] < 0 ? -a_.values[i] : a_.values[i];
r_.values[i] = a_.values[i] < 0 ? HEDLEY_STATIC_CAST(int16_t, -a_.values[i]) : a_.values[i];
}
#endif

Expand Down
33 changes: 23 additions & 10 deletions thirdparty/simde/arm/neon/add.h
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Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,8 @@ simde_vaddh_f16(simde_float16_t a, simde_float16_t b) {
return simde_float16_from_float32(af + bf);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vaddh_f16
#define vaddh_f16(a, b) simde_vaddh_f16((a), (b))
#endif
Expand Down Expand Up @@ -102,7 +103,8 @@ simde_vadd_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vadd_f16
#define vadd_f16(a, b) simde_vadd_f16((a), (b))
#endif
Expand Down Expand Up @@ -437,7 +439,8 @@ simde_vaddq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vaddq_f16
#define vaddq_f16(a, b) simde_vaddq_f16((a), (b))
#endif
Expand Down Expand Up @@ -809,7 +812,8 @@ simde_vadd_p8(simde_poly8x8_t a, simde_poly8x8_t b) {
return simde_poly8x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vadd_p8
#define vadd_p8(a, b) simde_vadd_p8((a), (b))
#endif
Expand All @@ -833,7 +837,8 @@ simde_vadd_p16(simde_poly16x4_t a, simde_poly16x4_t b) {
return simde_poly16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vadd_p16
#define vadd_p16(a, b) simde_vadd_p16((a), (b))
#endif
Expand All @@ -858,7 +863,9 @@ simde_vadd_p64(simde_poly64x1_t a, simde_poly64x1_t b) {
return simde_poly64x1_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_CRYPTO) && \
!defined(_GCC_ARM_NEON_H)))
#undef vadd_p64
#define vadd_p64(a, b) simde_vadd_p64((a), (b))
#endif
Expand All @@ -882,7 +889,8 @@ simde_vaddq_p8(simde_poly8x16_t a, simde_poly8x16_t b) {
return simde_poly8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vaddq_p8
#define vaddq_p8(a, b) simde_vaddq_p8((a), (b))
#endif
Expand All @@ -906,7 +914,8 @@ simde_vaddq_p16(simde_poly16x8_t a, simde_poly16x8_t b) {
return simde_poly16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vaddq_p16
#define vaddq_p16(a, b) simde_vaddq_p16((a), (b))
#endif
Expand All @@ -931,7 +940,9 @@ simde_vaddq_p64(simde_poly64x2_t a, simde_poly64x2_t b) {
return simde_poly64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_CRYPTO) && \
!defined(_GCC_ARM_NEON_H)))
#undef vaddq_p64
#define vaddq_p64(a, b) simde_vaddq_p64((a), (b))
#endif
Expand All @@ -950,7 +961,9 @@ simde_vaddq_p128(simde_poly128_t a, simde_poly128_t b) {
return b ^ ((0 ^ a) & mask);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_CRYPTO) && \
!defined(_GCC_ARM_NEON_H)))
#undef vaddq_p128
#define vaddq_p128(a, b) simde_vaddq_p128((a), (b))
#endif
Expand Down
12 changes: 8 additions & 4 deletions thirdparty/simde/arm/neon/aes.h
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Expand Up @@ -84,7 +84,8 @@ simde_vaeseq_u8(simde_uint8x16_t data, simde_uint8x16_t key) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaeseq_u8
#define vaeseq_u8(data, key) simde_vaeseq_u8((data), (key))
#endif
Expand Down Expand Up @@ -132,7 +133,8 @@ simde_vaesdq_u8(simde_uint8x16_t data, simde_uint8x16_t key) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaesdq_u8
#define vaesdq_u8(data, key) simde_vaesdq_u8((data), (key))
#endif
Expand Down Expand Up @@ -160,7 +162,8 @@ simde_vaesmcq_u8(simde_uint8x16_t data) {
return simde_uint8x16_from_private(a_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaesmcq_u8
#define vaesmcq_u8(data) simde_vaesmcq_u8((data))
#endif
Expand Down Expand Up @@ -207,7 +210,8 @@ simde_vaesimcq_u8(simde_uint8x16_t data) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaesimcq_u8
#define vaesimcq_u8(data) simde_vaesimcq_u8((data))
#endif
Expand Down
2 changes: 1 addition & 1 deletion thirdparty/simde/arm/neon/and.h
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Expand Up @@ -111,7 +111,7 @@ simde_vand_s32(simde_int32x2_t a, simde_int32x2_t b) {

#if defined(SIMDE_X86_MMX_NATIVE)
r_.m64 = _mm_and_si64(a_.m64, b_.m64);
#elif defined(SIMDE_RISCV_V_NATIVE)
#elif defined(SIMDE_RISCV_V_NATIVE)
r_.sv64 = __riscv_vand_vv_i32m1(a_.sv64, b_.sv64, 2);
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
r_.values = a_.values & b_.values;
Expand Down
6 changes: 4 additions & 2 deletions thirdparty/simde/arm/neon/bsl.h
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Expand Up @@ -62,7 +62,8 @@ simde_vbsl_f16(simde_uint16x4_t a, simde_float16x4_t b, simde_float16x4_t c) {
return simde_vreinterpret_f16_u16(simde_uint16x4_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vbsl_f16
#define vbsl_f16(a, b, c) simde_vbsl_f16((a), (b), (c))
#endif
Expand Down Expand Up @@ -381,7 +382,8 @@ simde_vbslq_f16(simde_uint16x8_t a, simde_float16x8_t b, simde_float16x8_t c) {
return simde_vreinterpretq_f16_u16(simde_uint16x8_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vbslq_f16
#define vbslq_f16(a, b, c) simde_vbslq_f16((a), (b), (c))
#endif
Expand Down
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