Skip to content

[ImportVerilog] Resolve modport member accesses through interface ports #10398

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
micprog wants to merge 2 commits into
base: main
Choose a base branch
from
+62 −4

Fix slang valgrind test

792a9b6
Select commit
Loading
Failed to load commit list.
Open

[ImportVerilog] Resolve modport member accesses through interface ports #10398

Fix slang valgrind test
792a9b6
Select commit
Loading
Failed to load commit list.

Workflow runs completed with no jobs