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[fixup] Misc alterations (NFC)
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momchil-velikov committed Dec 10, 2024
1 parent 8e90443 commit 90d8930
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Showing 2 changed files with 1 addition and 7 deletions.
2 changes: 1 addition & 1 deletion clang/include/clang/Basic/arm_sve_sme_incl.td
Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,7 @@ include "arm_immcheck_incl.td"
// j: element type promoted to 64bits (splat to vector type)
// K: element type bitcast to a signed integer (splat to vector type)
// L: element type bitcast to an unsigned integer (splat to vector type)
// !: mfloat8_t (splat to svmfloat8_t)
//
// i: constant uint64_t
// k: int32_t
Expand All @@ -105,7 +106,6 @@ include "arm_immcheck_incl.td"
// N: svfloat64_t
// $: svbfloat16_t
// ~: svmfloat8_t
// !: mfloat8_t (splat to svmfloat8_t)

// J: Prefetch type (sv_prfop)

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6 changes: 0 additions & 6 deletions llvm/lib/Target/AArch64/SVEInstrFormats.td
Original file line number Diff line number Diff line change
Expand Up @@ -10971,9 +10971,6 @@ multiclass sve2_fp8_dot_indexed_h<string asm, SDPatternOperator op> {

let Inst{20-19} = iop{2-1};
let Inst{11} = iop{0};

let mayLoad = 1;
let mayStore = 0;
}

def : SVE_4_Op_Pat<nxv8f16, op, nxv8f16, nxv16i8, nxv16i8, i32, !cast<Instruction>(NAME)>;
Expand All @@ -10984,9 +10981,6 @@ multiclass sve2_fp8_dot_indexed_s<string asm, SDPatternOperator op> {
bits<2> iop;

let Inst{20-19} = iop{1-0};

let mayLoad = 1;
let mayStore = 0;
}

def : SVE_4_Op_Pat<nxv4f32, op, nxv4f32, nxv16i8, nxv16i8, i32, !cast<Instruction>(NAME)>;
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