adding OPCode and Intrinsic

llvm/include/llvm/IR/IntrinsicsDirectX.td

@@ -35,6 +35,9 @@ def int_dx_typedBufferLoad_checkbit
 def int_dx_typedBufferStore
     : DefaultAttrsIntrinsic<[], [llvm_any_ty, llvm_i32_ty, llvm_anyvector_ty]>;
 
+def int_dx_updateCounter
+    : DefaultAttrsIntrinsic<[], [llvm_any_ty, llvm_anyint_ty]>;
+
 // Cast between target extension handle types and dxil-style opaque handles
 def int_dx_cast_handle : Intrinsic<[llvm_any_ty], [llvm_any_ty]>;
 

llvm/lib/Target/DirectX/DXIL.td

@@ -730,6 +730,16 @@ def BufferStore : DXILOp<69, bufferStore> {
   let stages = [Stages<DXIL1_0, [all_stages]>];
 }
 
+def UpdateCounter : DXILOp<70, bufferUpdateCounter> {
+  let Doc = "increments/decrements a buffer counter";
+  let LLVMIntrinsic = int_dx_updateCounter;
+  let arguments = [
+    HandleTy, Int8Ty
+  ];
+  let result = VoidTy;
+  let stages = [Stages<DXIL1_0, [all_stages]>];
+}
+
 def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> {
   let Doc = "checks whether a Sample, Gather, or Load operation "
             "accessed mapped tiles in a tiled resource";

llvm/test/CodeGen/DirectX/updateCounter.ll

@@ -0,0 +1,13 @@
+; RUN: opt -S -dxil-op-lower %s | FileCheck %s
+
+
+target triple = "dxil-pc-shadermodel6.6-compute"
+
+define void @loadv4f32() {
+  %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
+      @llvm.dx.handle.fromBinding.tdx.TypedBuffer_v4f32_0_0_0(
+          i32 0, i32 0, i32 1, i32 0, i1 false)
+
+  call void @llvm.dx.updateCounter(target("dx.TypedBuffer", <4 x float>, 0, 0, 0) %buffer, i8 -1)
+  ret void
+}