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TSB instruction has one operand, but the generated disassembler didn't
decode this operand. AArch64InstPrinter had a workaround for this.

This instruction can now be disassembled correctly.

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s-barannikov commented Sep 1, 2025

TSB instruction has one operand, but the generated disassembler didn't
decode this operand. AArch64InstPrinter had a workaround for this.

This instruction can now be disassembled correctly.
@s-barannikov s-barannikov force-pushed the users/s.barannikov/decoder-operands-4-aarch64-tsb branch from 8b1424a to c82858d Compare September 1, 2025 21:05
@s-barannikov s-barannikov force-pushed the users/s.barannikov/decoder-operands-3-avr branch from 235b15d to b1cd999 Compare September 1, 2025 21:05
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