Missing call to sem_check for HDL expressions in PSL. Issue #1001

src/psl/psl-sem.c

@@ -18,6 +18,7 @@
 #include "util.h"
 #include "diag.h"
 #include "names.h"
+#include "phase.h"
 #include "psl/psl-node.h"
 #include "psl/psl-phase.h"
 #include "type.h"
@@ -139,6 +140,9 @@ static void psl_check_hdl_expr(psl_node_t p, nametab_t *tab)
 
    assert(psl_type(p) == PSL_TYPE_BOOLEAN);
 
+   if (!sem_check(value, tab))
+      return;
+
    type_t std_bool = std_type(NULL, STD_BOOLEAN);
    bool ok = type_eq(type, std_bool);
 

test/psl/issue1001.vhd

@@ -0,0 +1,16 @@
+entity issue1001 is
+end entity;
+
+architecture test of issue1001 is
+    signal x, y : bit;
+
+    function f (v : bit_vector) return bit is
+    begin
+        return v(v'left);
+    end function;
+begin
+
+    assert always onehot(x);            -- Error
+    assert always x -> f(y);            -- Error
+
+end architecture;

test/test_psl.c

@@ -308,6 +308,25 @@ START_TEST(test_issue910)
 }
 END_TEST
 
+START_TEST(test_issue1001)
+{
+   set_standard(STD_08);
+
+   input_from_file(TESTDIR "/psl/issue1001.vhd");
+
+   const error_t expect[] = {
+      { 13, "no matching subprogram ONEHOT [BIT return BOOLEAN | BIT]" },
+      { 14, "type of actual BIT does not match formal V type BIT_VECTOR" },
+      { -1, NULL }
+   };
+   expect_errors(expect);
+
+   parse_and_check(T_ENTITY, T_ARCH);
+
+   check_expected_errors();
+}
+END_TEST
+
 Suite *get_psl_tests(void)
 {
    Suite *s = suite_create("psl");
@@ -320,6 +339,7 @@ Suite *get_psl_tests(void)
    tcase_add_test(tc_core, test_parse4);
    tcase_add_test(tc_core, test_parse5);
    tcase_add_test(tc_core, test_issue910);
+   tcase_add_test(tc_core, test_issue1001);
    suite_add_tcase(s, tc_core);
 
    return s;