Parse PSL cover directive in VHDL-2008. Fixes xxx

nickg · Sep 26, 2024 · f9fa19b · f9fa19b
1 parent 0630cd3
commit f9fa19b
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Showing 5 changed files with 20 additions and 12 deletions.
diff --git a/src/lexer.l b/src/lexer.l
@@ -448,6 +448,7 @@ CCOND             ?i:CCOND
 {RELEASE}                { TOKEN_08(tRELEASE); }
 {PARAMETER}              { TOKEN_08(tPARAMETER); }
 {DEFAULT}                { TOKEN_08(tDEFAULT); }
+{COVER}                  { TOKEN_08(tCOVER); }
 {VIEW}                   { TOKEN_19(tVIEW); }
 {PRIVATE}                { TOKEN_19(tPRIVATE); }
 

diff --git a/src/parse.c b/src/parse.c
@@ -176,7 +176,7 @@ static psl_node_t p_psl_sequence(void);
 static psl_node_t p_psl_property(void);
 static tree_t p_psl_builtin_function_call(void);
 static psl_node_t p_psl_sere(void);
-static tree_t p_psl_directive(void);
+static tree_t p_psl_directive(ident_t label);
 
 static bool consume(token_t tok);
 static bool optional(token_t tok);
@@ -10941,7 +10941,14 @@ static void p_concurrent_statement_or_psl(tree_t parent)
 {
    if (peek() == tSTARTPSL) {
       consume(tSTARTPSL);
-      tree_add_stmt(parent, p_psl_directive());
+
+      ident_t label = NULL;
+      if (peek() == tID) {
+         label = p_identifier();
+         consume(tCOLON);
+      }
+
+      tree_add_stmt(parent, p_psl_directive(label));
    }
    else
       tree_add_stmt(parent, p_concurrent_statement());
@@ -12470,7 +12477,7 @@ static psl_node_t p_psl_verification_directive(void)
    }
 }
 
-static tree_t p_psl_directive(void)
+static tree_t p_psl_directive(ident_t label)
 {
    // [ Label : ] Verification_Directive
 
@@ -12480,12 +12487,6 @@ static tree_t p_psl_directive(void)
 
    scan_as_psl();
 
-   ident_t label = NULL;
-   if (peek() == tID) {
-      label = p_identifier();
-      consume(tCOLON);
-   }
-
    // Verification directive can contain Proc_Block with
    // local declarations -> Push scope
    push_scope(nametab);
@@ -12737,6 +12738,9 @@ static tree_t p_concurrent_statement(void)
       else
          return p_concurrent_assertion_statement(label);
 
+   case tCOVER:
+      return p_psl_directive(label);
+
    case tBLOCK:
       return p_block_statement(label);
 

diff --git a/test/lower/cover.vhd b/test/lower/cover.vhd
@@ -1,10 +1,10 @@
 Library ieee;
 use ieee.std_logic_1164.all;
 
-entity cover is
+entity cover_ent is
 end entity;
 
-architecture test of cover is
+architecture test of cover_ent is
     signal s : integer;
     signal l : std_logic;
     signal l_vect : std_logic_vector(7 downto 0);

diff --git a/test/psl/parse2.vhd b/test/psl/parse2.vhd
@@ -12,4 +12,7 @@ begin
     assert always e or y -> x;          -- Error
     assert x = '1' report "ok" severity note;  -- OK (VHDL)
 
+    cov_0: cover {x};                   -- OK
+    cover {y; x};                       -- OK
+
 end architecture;
diff --git a/test/test_lower.c b/test/test_lower.c
@@ -1938,7 +1938,7 @@ START_TEST(test_cover)
    cover_data_t *data = cover_data_init(COVER_MASK_STMT | COVER_MASK_EXPRESSION | COVER_MASK_BRANCH, 0);
    elab(tree_to_object(a), jit, ur, data, NULL);
 
-   vcode_unit_t v0 = find_unit("WORK.COVER.P1");
+   vcode_unit_t v0 = find_unit("WORK.COVER_ENT.P1");
    vcode_select_unit(v0);
 
    EXPECT_BB(1) = {