1.14.0
This is a major new release with the following changes:
- Waiting on implicit
'stable
and'quiet
signals now works correctly. - Updated to OSVVM 2024.07 and UVVM 2024.07.03b for
nvc --install
. - Added a warning when an inner declaration hides an outer declaration in a way that is likely to be unintentional (#905).
- The
-c
sub-command for coverage is deprecated and replaced with separate--cover-report
and--cover-merge
commands. See the manual for details. - The argument to the
--cover-export
command is now the path to a coverage database file instead of a top-level unit name. - The
--force-init
command which was deprecated in the 1.7 release has been removed. - Coverage exclude files now support
fold
command to merge coverage data from independent sub-hierarchies (from @Blebowski). - FSM state coverage bin renamed from
STATE
toBIN_STATE
. - A signature is now allowed in the formal part of generic map associations in VHDL-2019 mode.
use lib.pack.all
no longer makes the bare package namepack
potentially visible.- Very limited initial Verilog support has been added, including the ability to instantiate vendor-supplied UDPs from VHDL.
- Fixed a regression which caused parse errors for some concurrent assertion statements (#956).
- Arrays-of-arrays with
downto
direction are now dumped in the correct order (#957). - Fixed incorrect result of
'event
and'active
where the prefix is an array of records. - Fixed a crash when the
'stable
attribute is used with a record type (#960). - Conversion functions applied to individual record elements in a port map now work correctly (#963).
- External name elaboration order checks were overly strict (#964).
- Associating a signal with an
out
orinout
parameter in a procedure that is not within a process now produces an analysis error rather than crashing at runtime (#965). - The
--dump-arrays
option now takes an optional argument to specify an upper limit on the length of nested arrays to dump (#959). - Matching
case?
statements are now checked for duplicate and missing choices at analysis time (#966). - Limited maximum instantiation depth to prevent crashes due to stack overflow when elaborating a design that has unbounded recursive entity instantiation (#969).
- Physical subtype ranges and 64-bit integer types are now handled correctly by VHPI (#978).
- Added support for generic map on subprogram call in VHDL-2019 and improved support for array type generics.
- Optimised emission of FST initial signal values which also fixes a potential crash (#979).
- Added checks for duplicate attribute specification (#977).
- Several other minor bugs were resolved (#961, #962, #971, #975, #985).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!