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[BUG] Optional Zifencei extension #2734

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ASintzoff opened this issue Jan 23, 2025 · 1 comment
Open
1 task done

[BUG] Optional Zifencei extension #2734

ASintzoff opened this issue Jan 23, 2025 · 1 comment
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@yanicasa @zchamski
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CV32A65X Part: Embedded configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system

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@ASintzoff
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Is there an existing CVA6 bug for this?

  • I have searched the existing bug issues

Bug Description

The extension Zifencei (fence.i instruction) shall be optional.

Therefore, a parameter RVZifencei shall be defined to configure it at RTL level. The extension shall be disabled on CV32A60X and CV32A65X (@yanicasa).

A way to disable the extension (fence.i instruction) shall be provided by Spike. (@zchamski)
@ASintzoff ASintzoff added CV32A65X Part: Embedded configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system labels Jan 23, 2025
@zchamski
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Spike implementation of fence.i assumes that Zifencei standard extension is always present: it does not have the appropriate require(EXT_....) clause in the instruction implementation of fence.i.

Spike TODOs:

  • Ensure that the proper flag for optional presence of Zifencei exists (implement one if not.)
  • Add appropriate guard to fence.i implementation.
  • Update ISA strings where appropriate.
  • Test.

This was referenced Jan 24, 2025
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JeanRochCoulon pushed a commit to openhwgroup/core-v-verif that referenced this issue Feb 11, 2025
@zchamski
[Spike] Fix #2579: Require explicit Zifencei in ISA to enable fence.i…
bd0afb4 
… instruction. (#2580)

Spike part of fix to CVA6 issue openhwgroup/cva6#2734.

Spike code explicitly assumed Zifencei as being present for backward compatibility, cf. the diff on isa_parser.cc.
This request changes the original Spike behavior to require the explicit inclusion of Zifencei in the ISA string to enable the fence.i instruction.
@zchamski zchamski mentioned this issue Mar 11, 2025
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JeanRochCoulon pushed a commit that referenced this issue Mar 13, 2025
@zchamski
[CV32A6*X] Disable Zifencei across the verification infrastructure. (#…
c2794df 
…2822)

This MR implements the non-RTL part of CVA6 project changes needed for #2734:
* changes to scripts
* changes to configuration files
* turn off Zifencei support in RTL configuration.
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@yanicasa yanicasa

@zchamski zchamski

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CV32A65X Part: Embedded configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
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@yanicasa @ASintzoff @zchamski