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Issues list

Get rid of the argument to WireKind::ClkOut
#9 opened Feb 25, 2025 by wanda-phi
Design a means of obtaining and storing bel "prototypes" and passing them to prjunnamed
#8 opened Feb 25, 2025 by wanda-phi
Standardize on W/E/S/N for on-chip directions everywhere in the project.
#7 opened Feb 22, 2025 by wanda-phi
1 of 12 tasks
Xilinx in-hardware verification
#6 opened Feb 20, 2025 by wanda-phi
9 of 24 tasks
Add a BSDL parser, verify Xilinx scan chains against BSDL files
#5 opened Feb 20, 2025 by wanda-phi
Finish Coolrunner II documentation
#4 opened Feb 20, 2025 by wanda-phi
Add timing data for ISE-supported devices
#3 opened Feb 20, 2025 by wanda-phi
8 tasks
Finish prjcombine-siliconblue roadmap
#2 opened Feb 20, 2025 by wanda-phi
58 tasks
Be a good little sub~~module~~ for prjunnamed roadmap
#1 opened Feb 20, 2025 by wanda-phi
5 of 24 tasks
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