Clarify some requirements for the instruction sequence #40
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1. Since the nops are described as "Entry" and "Exit" nops it kind of sounds like you're entering a semi-hosting mode and you could do e.g. `entry nop; <other instructions> ebreak; <other instructions> exit nop;`. That isn't the case but this wasn't explicitly clear. 2. It wasn't totally clear how debuggers are expected to detect this sequence. Checking memory is the obvious way but it feels rather hacky too, so it's good to be explicit about that. 3. The bit about being 'paged in else' was not totally clear. Also it doesn't hurt to explain how you do that. Signed-off-by: Tim Hutt <[email protected]>
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Since the nops are described as "Entry" and "Exit" nops it kind of sounds like you're entering a semi-hosting mode and you could do e.g.
entry nop; <other instructions> ebreak; <other instructions> exit nop;. That isn't the case but this wasn't explicitly clear.It wasn't totally clear how debuggers are expected to detect this sequence. Checking memory is the obvious way but it feels rather hacky too, so it's good to be explicit about that.
The bit about being 'paged in else' was not totally clear. Also it doesn't hurt to explain how you do that.