Architecture

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This is taken from some Skype messages from MJoergen to sy2002 during the upgrade of M2M from supporting only one board revision (R3/R3A) to supporting multiple board revisions. We will need to update also the intro documentation that gives a high-level architectural overview of M2M to fit to the new reality:

I've made quite some progress in the M2M refactoring. The purpose is to make it easier to add support for other boards (R4, R5, etc).

I've come up with a slightly revised architecture. Let me explain, and use the C64 core as an example.

The overall guideline is to split files into two groups:

• Files that depend on the core, but are independent of the board revision. These are placed in the CORE folder.
• Files that depend on the board revision, but are independent of the core. These are placed in the M2M folder. Anything that depends on BOTH the core and the board revision must be split up into one of the two above categories.

There will be one top-level file for each board revision. We will thus have files like

• M2M/vhdl/top_mega65_r3.vhd
• M2M/vhdl/top_mega65_r4.vhd
• M2M/vhdl/top_mega65_r5.vhd
• M2M/vhdl/top_nexys.vhd etc.

Each of these top-level files will instantiate the core (CORE/vhdl/mega65.vhd) and a board-specific Hardware Abstraction Layer. The latter will be named:

• M2M/vhdl/hal_mega65_r3.vhd
• M2M/vhdl/hal_mega65_r4.vhd
• M2M/vhdl/hal_mega65_r5.vhd
• M2M/vhdl/hal_nexys.vhd

Each of these HAL-files will consist of two things:

• The common M2M framework (M2M/vhdl/framework.vhd). This includes the QNICE, plus anything else that is common for all the platforms.
• Any board-specific adaptations. E.g. the R3 version will have an interface to the MAX10 as well as a PWM audio module, whereas the R4 version will have a controller for the Audio DAC.

Regarding constraint files there will be an M2M constraint file for each board revision, i.e.

• M2M/MEGA65-R3.xdc
• M2M/MEGA65-R4.xdc
• M2M/MEGA65-R5.xdc These files contain all the FPGA pin mappings, as well as timing constraints for the M2M framework. Additionally, each core may optionally have a core-specific constraint file, with e.g. extra clocks and timing constraints. This core-specific file will be located at CORE/CORE.xdc