Skip to content

Invert condition logic for alternation switch optimization in source …

7f657d5
Select commit
Loading
Failed to load commit list.
Merged

Port alternation switch optimization from source generator to RegexCompiler #122959

Invert condition logic for alternation switch optimization in source …
7f657d5
Select commit
Loading
Failed to load commit list.
Azure Pipelines / runtime (Build Libraries Test Run release coreclr osx arm64 Debug) succeeded Jan 26, 2026 in 15m 38s

Build Libraries Test Run release coreclr osx arm64 Debug succeeded